Pixel Array Substrate Scan Line Overlap Layout

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing resolution of display panels for virtual, augmented, and mixed reality applications poses a challenge in maintaining productivity due to reduced space for pixel structure arrangement and pixel driving circuit design, which is constrained by manufacturing process limitations.

Innovation Solution

A pixel array substrate design featuring a substrate with pixel structures, scan devices, and a connecting portion that overlaps semiconductor patterns, allowing for reduced configuration space and increased process margin, enabling double-gate configuration even with reduced pixel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the resolution of the display panel is increased, then the visual experience is improved, but the space for arranging pixel structures decreases

Engineering Contradiction:
ImproveresolutionVSAvoidspace for pixel structures
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent transitions from conventional planar pixel arrangements to a three-dimensional stacked architecture where pixel structures are arranged vertically across multiple layers. This vertical stacking enables higher resolution by packing more pixels within the same lateral footprint, effectively utilizing the third dimension to overcome space constraints.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The pixel structure is divided into multiple functional segments arranged in stacked layers, including light-emitting layers, charge transport layers, and electrode structures. Each layer performs a specific function, allowing independent optimization of each segment while achieving overall high-resolution performance through the integrated stacked configuration.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If the pixel size is reduced to increase resolution, then more pixels can be arranged, but the design of pixel driving circuits becomes constrained by manufacturing process limits

Engineering Contradiction:
Improvepixel densityVSAvoidpixel driving circuit design
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple driving circuit functions are merged into the stacked pixel structure itself, where charge transport layers and electrode structures serve dual purposes as both functional pixel components and integrated circuit elements. This integration eliminates the need for separate driving circuit structures, simplifying design while maintaining manufacturability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The stacked pixel structure incorporates multi-functional layers that simultaneously perform pixel emission functions and circuit driving functions. For example, charge transport layers serve both to move charges within the pixel and to function as conductive interconnects for the driving circuit, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If conventional pixel arrangements are used, then manufacturing processes are straightforward, but productivity decreases due to space constraints

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidproduction efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent employs vertical stacking of pixel layers that can be manufactured using sequential deposition and patterning processes. Each layer is fabricated independently using standard thin-film techniques, maintaining ease of manufacture while the vertical integration enables higher pixel density and improved productivity through better space utilization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10903245B2Pixel array substrate
Publication Date: 2021.01.26 AU OPTRONICS CORP
  • US10903245B2 patent drawing
  • US10903245B2 patent drawing
  • US10903245B2 patent drawing

AI summary

A pixel array substrate including a substrate, a plurality of pixel structures and a scan device is provided. The pixel structures are arranged on the substrate along a first direction. Each pixel structure includes a data line, an active device and a pixel electrode. The active device has a semiconductor pattern, a source electrode and a drain electrode. The source electrode and the drain electrode are electrically connected to the data line and the pixel electrode respectively. The scan device includes a first and a second scan line. The first and the second scan line extend in the first direction and are electrically connected to each other. The active devices of the pixel structures are electrically connected to the first and the second scan line. The first and the second scan line respectively overlap two different regions of the semiconductor pattern of each active device.