Pixel Array Substrate With Separate TFTs Per Sub-Region
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Solution Overview
Problem
In large-size liquid crystal displays with high resolution and high display frequency, the increased number of gate lines and data lines leads to larger TFTs, affecting the uniformity of analog circuit design and display quality.
Innovation Solution
The array substrate design includes separate thin film transistors (TFTs) for each sub-region of a pixel unit, with a gate line dividing the pixel into two sub-regions, and a specific arrangement of common electrode lines and data lines to improve uniformity and capacitance, reducing parasitic capacitors and preventing light leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of gate lines and data lines is increased to provide large-size liquid crystal display with high resolution and high display frequency, then the display resolution and display frequency are improved, but the size of TFT in each pixel increases, affecting uniformity of analog circuit design and display quality
Solution Approach 1:
The pixel unit is divided into two sub-regions by a gate line, with each sub-region having its own separate TFT. This segmentation allows each TFT to be smaller and more uniform in size while still achieving high display resolution through the increased number of gate lines and data lines.
2Loss of time
If the size of TFT in each pixel is increased to support high resolution and high display frequency, then the charging time period can be reduced, but the uniformity of analog circuit design and display quality are adversely affected
Solution Approach 1:
By segmenting the pixel into two sub-regions with separate TFTs, each TFT can be optimized for faster charging while maintaining uniformity. The segmentation allows for reduced charging time period through multiple parallel charging paths without requiring oversized individual TFTs.
Solution Approach 2:
The gate line is arranged to divide the pixel unit into two sub-regions, adding a dimensional division that creates separate charging paths. This dimensional change enables reduced charging time while maintaining TFT uniformity through the parallel structure.
3Productivity
If the number of gate lines and data lines is increased, then the display frequency is improved, but the size of each pixel and TFT increases, affecting display quality
Solution Approach 1:
The segmentation of pixels into sub-regions with separate TFTs enables high display frequency through increased gate and data lines while maintaining display quality. Each sub-region's TFT can be kept small and uniform, preventing the quality degradation that would result from oversized TFTs.
Data Source
AI summary
The present disclosure provides an array substrate and a display device. The array substrate includes: first common electrode lines; gate lines; a gate insulation layer; data lines, the first common electrode lines crossing the data lines to define a plurality of pixel units, each gate line dividing a corresponding pixel unit into two sub-regions, a separate TFT being arranged at each sub-region; second common electrode lines; and a drain electrode pad arranged at each sub-region and a drain electrode connection line for connecting the drain electrode pad to a drain electrode of the TFT. The drain electrode pad, the drain electrode connection line and the drain electrode are arranged at an identical layer. An orthogonal projection of each second common electrode line onto the base substrate overlaps an orthogonal projection of the drain electrode pad onto the base substrate.