Pixel Circuit Bias Reset for Low-Frequency Flicker Control
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Solution Overview
Problem
In low-frequency displays, the driving transistor in pixel circuits drifts out of a predetermined bias state during non-light emitting periods, leading to hysteresis and flicker issues.
Innovation Solution
A pixel circuit design that includes a data writing circuit, compensation control circuit, initialization circuits, and storage circuit to control the driving transistor's bias state during refresh and hold frames, using extended voltage durations for control signals to stabilize the transistor and improve hysteresis and flicker.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the pixel circuit performs low frequency display with hold frames, then power consumption is reduced, but the driving transistor drifts out of bias state during non-light emitting periods causing hysteresis and flicker
Solution Approach 1:
The patent applies preliminary action by writing reset voltage to the first terminal of the driving circuit during the reset phase of the hold frame, before the next refresh frame begins. This preliminary reset action ensures the driving transistor is pre-positioned in the correct bias state, preventing drift and hysteresis effects that would otherwise occur during the extended non-light emitting periods of low-frequency display operation.
2Reliability
If the driving transistor is controlled during non-light emitting period, then hysteresis and flicker are reduced, but additional control circuits and signal phases are required
Solution Approach 1:
The patent applies universality by designing the data writing circuit to perform multiple functions: it writes data voltage during the data writing phase of refresh frames, and writes reset voltage during the reset phase of hold frames. This multi-functional approach enables bias state control without requiring a separate dedicated control circuit, thereby reducing overall device complexity while maintaining display quality.
3Reliability
If reset voltage is written during hold frame, then driving transistor bias state is maintained, but display period timing becomes more complex
Solution Approach 1:
The patent applies periodic action by implementing a periodic reset phase within the hold frame of the display period. This periodic action occurs at regular intervals corresponding to each hold frame, systematically maintaining the driving transistor bias state without requiring continuous control signals, thereby managing timing complexity through rhythmic, predictable operations.
Data Source
AI summary
A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, and a data writing circuit; the data writing circuit is electrically connected to a first scanning terminal, a data line and a first terminal of the driving circuit, and is configured to write a data voltage provided by the data line into the first terminal of the driving circuit under control of a first scanning signal provided by the first scanning terminal during a data writing phase included in a refresh frame, and write a reset voltage provided by the data line into the first terminal of the driving circuit under control of the first scanning signal during a reset phase included in a hold frame; the driving circuit is configured to drive the light-emitting element under control of a potential of a control terminal thereof.