Pixel Block Scaling Circuit for Memory-Constrained Image Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing image processing systems require large memory capacity to store decoded image data, leading to increased production costs and inefficient use of memory, especially when displaying compressed images.
Innovation Solution
An image-scaling-down method that divides pixel blocks into sub-blocks and calculates processed pixel data using a scaling down factor, eliminating the need for temporary memory storage by only using pixel data within one pixel block for scaling down operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decoded image data is stored in memory for display, then the display device can access and display the image, but the memory capacity required becomes very large (30 MB for 10 million pixels)
Solution Approach 1:
The image is divided into multiple pixel blocks, each processed independently through the scaling-down circuit. This segmentation allows the system to process and display images without requiring memory to store the entire decoded image, as each block is handled separately and sequentially.
Solution Approach 2:
The scaling-down operation is performed immediately after decoding each pixel block before the data would need to be stored in memory. By pre-processing the image data to reduce its size before potential storage, the system eliminates the need for large memory capacity while maintaining display capability.
2Ease of operation
If the decoded image data is converted to output image data for display, then the image can be displayed at the correct resolution, but additional processing circuits are required
Solution Approach 1:
The scaling-down function is merged with the existing image decoding and processing circuits. The scaling-down circuit integrates with the pixel block processing pipeline, combining multiple functions (decoding, scaling, and output preparation) into a unified circuit structure that reduces overall system complexity.
Solution Approach 2:
The pixel block processing circuit is designed to perform multiple functions: decoding compressed image data, scaling down the pixel blocks, and preparing output data for display. This multi-functional approach eliminates the need for separate dedicated circuits for each operation, reducing device complexity while maintaining display compatibility.
3Loss of information
If large memory capacity is allocated for storing decoded image data, then complete image data is available for processing, but production cost increases
Solution Approach 1:
The patent extracts only the essential processing function from the memory system. Instead of using large memory to store complete decoded image data, the system extracts and processes pixel blocks sequentially, obtaining only the necessary data for current processing operations, thereby eliminating the need for expensive large-capacity memory while maintaining image data completeness for display.
Data Source
AI summary
An image-scaling-down method for scaling down a pixel block of an image component is provided. The pixel block includes a plurality of sub-blocks and each sub-block includes m number of non-processed pixel data where m is a positive integer. The image-scaling-down method comprises: determining a scaling down factor wherein m divided by n is the scaling down factor and n is a positive integer less than m; and calculating n number of processed pixel data in each sub-block by using the scaling down factor and the m number of the non-processed pixel data, wherein the combination of the n number of the processed pixel data of the sub-blocks corresponds to the image component.