Pixel Circuit With Boosting Capacitor to Minimize Display Ghosting

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Solution Overview

Problem

Display devices experience luminance differences and distortion phenomena due to leakage currents and hysteresis characteristics of driving transistors, particularly at low driving frequencies, leading to ghost images and reduced display quality.

Innovation Solution

Incorporation of a boosting capacitor connected to the gate electrode of the driving transistor and an initialization transistor, along with a specific scan and emission control signal timing, to minimize ghost phenomena by applying bias voltage effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a bias voltage is supplied to the driving transistor during the blank period to compensate for leakage current and hysteresis, then display quality is improved, but a ghost phenomenon occurs at the upper portion of the display panel

Engineering Contradiction:
Improvedisplay qualityVSAvoidghost phenomenon
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the pixel array into upper and lower portions relative to the middle scan line, and applies different voltage supply strategies to each segment. The lower portion receives data voltage during active period while the upper portion receives bias voltage during blank period, preventing temporal overlap and eliminating the ghost phenomenon while maintaining display quality compensation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies bias voltage to the upper portion pixels during the blank period before the next active period begins. This preliminary action compensates for leakage current and hysteresis effects in advance, ensuring stable display quality without causing ghost images during the subsequent active period.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the number of data lines is decreased by supplying both data voltage and bias voltage through one data line, then device complexity is reduced, but distortion phenomenon occurs due to overlapping voltage application times

Engineering Contradiction:
Improvenumber of data linesVSAvoiddisplay uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent divides the pixel array into segments based on their position relative to the middle scan line. By segmenting the voltage supply timing and target regions, the patent enables single data line to serve multiple functions without causing temporal overlap, thus reducing device complexity while maintaining display uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the function of the data line based on the operational mode. During active period, the data line supplies data voltage to lower portion pixels; during blank period, it supplies bias voltage to upper portion pixels. This dynamic switching eliminates distortion while maintaining reduced line complexity.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents or minimizes ghost images, thereby improving display quality by stabilizing the gate voltage of the driving transistor and reducing luminance differences across active and blank periods.

Implementation Method 1

a boosting capacitor connected between a gate electrode of the driving transistor and a gate electrode of an initialization transistor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20260018114A1Pixel and display device having the same
Publication Date: 2026.01.15 SAMSUNG DISPLAY CO LTD
  • US20260018114A1 patent drawing
  • US20260018114A1 patent drawing
  • US20260018114A1 patent drawing

AI summary

A pixel may include: a light emitting element; a first transistor connected between a first node electrically connected to a first driving power source and a second node electrically connected to an anode electrode of the light emitting element, the first transistor to control a driving current; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node connected to a gate of the first transistor; a fourth transistor connected between the third node and a first initialization power source; a fifth transistor connected between a second initialization power source and the anode electrode of the light emitting element, the fifth transistor being turned on by a scan signal provided to a scan line; and a boosting capacitor connected between the scan line and the third node.