Calibrated Pixel Circuit Using Phase Change Memory for Uniform Brightness
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Solution Overview
Problem
Existing optoelectronic devices face issues with brightness variations due to manufacturing inconsistencies among identical pixels, leading to undesired brightness levels.
Innovation Solution
A pixel design incorporating a transistor, light emitting element, phase change memory cell, and control circuit that allows for independent calibration by generating specific control voltages for resetting, setting, and driving the memory, along with a calibration method to ensure uniform brightness across pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If identical pixels are used in the display array, then manufacturing is simplified and cost is reduced, but brightness uniformity deteriorates due to fabrication variations
Solution Approach 1:
The patent applies preliminary action by measuring and storing calibration data for each pixel during the manufacturing process. The calibration circuit measures the actual brightness of each pixel and stores the calibration value in a memory cell before the display is assembled, allowing each pixel to be pre-adjusted to compensate for fabrication variations.
Solution Approach 2:
The patent implements local quality by providing each pixel with its own dedicated calibration circuit and memory cell, allowing individual adjustment of each pixel's brightness characteristics. This enables localized compensation for manufacturing variations without affecting other pixels.
2Adaptability or versatility
If volatile memory cells are used for pixel calibration, then data can be written and read, but high voltage generation circuits are required increasing pixel size
Solution Approach 1:
The patent extracts the high-voltage generation requirement by using non-volatile memory cells that can be programmed with standard low-voltage circuits. The calibration data is stored in simple non-volatile memory cells that do not require complex high-voltage generation circuits for reading, only for initial programming.
Solution Approach 2:
The patent changes the memory type from volatile to non-volatile, which fundamentally alters the voltage requirements. Non-volatile memory cells can be programmed once during calibration and then read repeatedly without requiring high voltage, thus reducing the pixel area while maintaining calibration functionality.
3Illumination intensity
If calibration is performed for each pixel, then brightness uniformity is improved, but device complexity increases due to additional circuits
Solution Approach 1:
The patent merges the calibration functionality into the existing pixel structure by integrating the calibration circuit and memory cell within the pixel itself. This allows calibration operations to be performed using the same control signals and timing as the normal display operation, reducing overall system complexity.
Solution Approach 2:
The patent implements multi-functionality by designing the pixel circuit to serve both normal display operation and calibration functions using the same hardware components. The calibration circuit uses the same transistors and interconnects as the display mode, allowing a single circuit structure to perform multiple functions without requiring separate dedicated calibration hardware.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables uniform brightness across pixels by calibrating each pixel independently, reducing static current and power consumption, and eliminating the need for dedicated high-voltage generation circuits, thereby minimizing pixel size and enhancing display performance.
Implementation Method 1
a memory comprising at least one phase change memory cell
Data Source
AI summary
A pixel including: a light emitting element; a memory including at least one non-volatile memory cell; a first switch including a first output terminal coupled to the light emitting element, a second output terminal coupled to the non-volatile memory and an input terminal coupled to a supply node by a transistor; and a control circuit configured to generate a control voltage on a control terminal of the transistor, the control voltage being equal to: a first voltage during a step of resetting at least one cell of the memory; a second voltage during a step of setting at least one cell of the memory; a third voltage during a step of driving the element.