Pixel Capacitor Layout for Dense Display Integration and Data Writing

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Solution Overview

Problem

Current display devices face challenges in increasing the degree of integration of pixels and signal lines while maintaining image quality, particularly in efficiently writing data voltages.

Innovation Solution

The display device incorporates a configuration with multiple transistors and capacitors, including a shared source electrode for transistors and overlapping initialization voltage lines, data lines, and capacitors to enhance integration and writing efficiency, utilizing a specific layout and insulation layers to optimize signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of pixels is increased to improve resolution, then image quality is improved, but the degree of integration of pixels and signal lines becomes more difficult to maintain

Engineering Contradiction:
Improveimage qualityVSAvoiddegree of integration
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the initialization voltage line with the source electrode of the second transistor, allowing the initialization voltage line to serve dual purposes: providing initialization voltage to multiple pixels and acting as part of the transistor structure. This reduces the number of separate components and maintains integration density while supporting higher pixel counts for improved image quality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The initialization voltage line is designed to extend across multiple pixels and provide initialization voltage to the second transistor in each pixel. By making this line multi-functional and shared across pixels, the patent reduces the overall number of signal lines needed, thereby maintaining degree of integration even as pixel density increases for better image quality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If transistors and capacitors are densely integrated to increase pixel density, then resolution is improved, but data voltage writing efficiency deteriorates

Engineering Contradiction:
ImproveresolutionVSAvoiddata voltage writing efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the capacitor structure into two parts: one connected to the first transistor (for threshold voltage compensation) and another connected to the data line (for data voltage storage). This segmentation allows the capacitor to perform multiple functions efficiently, enabling dense integration while maintaining data voltage writing efficiency through optimized signal transmission paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The capacitor acts as an intermediary element between the data line and the first transistor. By positioning the capacitor strategically and connecting it to both the data line and the first transistor, the patent facilitates efficient data voltage transmission while enabling dense integration of pixels. The capacitor mediates the signal flow, ensuring writing efficiency is maintained despite high integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If signal lines are reduced to increase integration density, then degree of integration is improved, but signal transmission quality may deteriorate

Engineering Contradiction:
Improvedegree of integrationVSAvoidsignal transmission quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

By merging the initialization voltage line with the source electrode structure, the patent reduces the number of separate signal lines while ensuring that initialization voltage is still reliably delivered to the second transistor. This merging maintains signal transmission quality through proper electrical connection while improving integration density.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes vertical stacking and multi-layer configurations to route signal lines in three-dimensional space rather than only in the planar direction. By moving to another dimension, the patent can maintain adequate signal transmission paths and quality while achieving higher integration density through vertical arrangement of components and signal lines.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for increased pixel and signal line integration, improving data voltage writing efficiency and maintaining high image quality by optimizing signal transmission and reducing power consumption.

Implementation Method 1

a capacitor electrode that overlaps the data line... forming a second capacitor with the data line

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12035592B2Display device including a first capacitor with a gate electrode and a second capacitor with a data line
Publication Date: 2024.07.09 SAMSUNG DISPLAY CO LTD
  • US12035592B2 patent drawing
  • US12035592B2 patent drawing
  • US12035592B2 patent drawing

AI summary

A display device includes a first pixel including a first transistor, a second transistor, and a third transistor, a second pixel disposed adjacent to the first pixel in a first direction, and including a first transistor, a second transistor, and a third transistor, and an initialization voltage line disposed between the first pixel and the second pixel, and extending in a second direction crossing the first direction. The second transistor of the first pixel and the second transistor of the second pixel are connected to the initialization voltage line. The first, second, and third transistors of the first pixel and the first, second, and third transistors of the second pixel are symmetrical with respect to the initialization voltage line.