Pixel Storage Capacitor Layout for Reduced OLED Microdisplay Pitch
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display technologies face challenges in optimizing pixel pitch and display efficiency, particularly in large-size silicon OLED micro display panels, due to the spatial constraints imposed by the arrangement of storage sub-circuits in pixel driving circuits.
Innovation Solution
The implementation of a display substrate with a pixel driving circuit that includes a series-connected first and second capacitor, where the capacitors overlap partially in a direction perpendicular to the array layer, allowing for efficient use of space and reducing pixel pitch, thereby enhancing display efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the storage sub-circuit uses conventional capacitor arrangement, then the pixel driving circuit can function properly, but the pixel pitch cannot be reduced and display efficiency is limited
Solution Approach 1:
The patent transitions from planar capacitor arrangement to three-dimensional stacking by placing capacitors in different layers (first capacitor in first capacitor layer, second capacitor in second capacitor layer) with vertical overlap. This vertical arrangement in the thickness direction enables compact pixel circuit design, reduces pixel pitch, and increases display efficiency without compromising capacitor functionality.
2Area of stationary object
If capacitors are arranged in series with vertical overlap, then space utilization increases and pixel pitch reduces, but manufacturing complexity increases
Solution Approach 1:
The storage sub-circuit is segmented into two separate capacitors (first capacitor and second capacitor) placed in different layers. This segmentation allows independent optimization of each capacitor's structure and connection, simplifying the overall manufacturing process while achieving compact vertical stacking. The first capacitor connects to the first node and the second capacitor connects to the second node, enabling modular assembly.
3Productivity
If multiple capacitors are stacked vertically, then space is maximized and pixel density increases, but the risk of manufacturing defects increases
Solution Approach 1:
Insulating layers are introduced as intermediaries between the first capacitor and the second capacitor in the vertical stack. These insulating layers electrically isolate the capacitors while allowing physical proximity, preventing parasitic coupling and short circuits. The insulating layers act as mediators that enable tight vertical packing without compromising electrical reliability or introducing manufacturing defects.
Data Source
AI summary
A display substrate includes an array substrate including pixels and pixel driving circuits. A pixel driving circuit includes a driving sub-circuit and a storage sub-circuit. The storage sub-circuit includes: a first capacitor coupled to a first node and a second node, and a second capacitor coupled to the second node and a first voltage signal terminal. The driving sub-circuit is configured to generate a driving current under control of the storage sub-circuit and transmit the driving current to a light-emitting device. In a direction perpendicular to the array layer, the first plate, the second plate, the third plate and the fourth plate have an overlapping region therebetween.