Pixel Capacitor Layout for High-Resolution Light Emission Control
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Solution Overview
Problem
Current display apparatus technologies face challenges in achieving high resolution and integration while efficiently controlling light emission, particularly in the arrangement of thin film transistors, capacitors, wirings, and electrodes, which affects the accuracy and quality of displayed images.
Innovation Solution
The display apparatus includes a substrate with a driving thin film transistor, a capacitor, and contact plugs, where the first dielectric pattern within the capacitor has a higher permittivity than the interlayer insulating layer, and the electrodes are strategically positioned with the interlayer insulating layer between them, allowing for precise control of light emission and high integration. The manufacturing method involves forming these components using specific etching processes and material layers to optimize their placement and functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of electronic elements (thin film transistors, capacitors, wirings, electrodes) is increased to achieve high resolution and high integration, then the display quality and control accuracy improve, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent combines multiple electronic elements (thin film transistors, capacitors, wirings, and electrodes) into a highly integrated arrangement where shared structures and common layers are used. For example, the same electrode patterns serve multiple functions, and insulating layers are strategically positioned to provide both electrical isolation and structural support for multiple components simultaneously.
Solution Approach 2:
The patent utilizes three-dimensional spatial arrangement and layering to accommodate increased component density. By stacking elements in multiple layers and using vertical positioning (thickness direction) in addition to planar arrangement, the design achieves high integration without proportionally increasing planar footprint, thus managing complexity while maintaining control accuracy.
2Reliability
If the permittivity of dielectric materials is increased to improve electrostatic capacitance, then the light emission control improves, but the parasitic capacitance increases
Solution Approach 1:
The patent applies different permittivity values to different dielectric layers based on their specific functional requirements. The first interlayer insulating layer uses a first permittivity value optimized for reducing parasitic capacitance in certain regions, while the second interlayer insulating layer uses a second permittivity value optimized for providing sufficient electrostatic capacitance in other regions. This localized optimization allows the system to achieve reliable light emission control while minimizing harmful parasitic effects.
Solution Approach 2:
The patent systematically varies the permittivity parameter across different dielectric layers and regions. By adjusting the permittivity values of different insulating layers (first interlayer insulating layer vs. second interlayer insulating layer), the design optimizes the balance between electrostatic capacitance and parasitic capacitance, achieving improved reliability without excessive parasitic interference.
3Manufacturing precision
If more interlayer insulating layers are added to isolate electrodes and reduce parasitic capacitance, then the manufacturing precision improves, but the device complexity and manufacturing steps increase
Solution Approach 1:
The patent designs interlayer insulating layers that serve multiple functions simultaneously. Each insulating layer provides electrical isolation between electrodes, structural support for subsequent layers, and contributes to the overall capacitance characteristics. The first and second interlayer insulating layers are positioned to provide both isolation and capacitance functions, reducing the need for additional dedicated isolation layers and simplifying the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the display apparatus' resolution and integration, allowing for precise control of light emission and reducing parasitic capacitance, resulting in a high-quality display with improved electrostatic capacitance and manufacturing efficiency.
Implementation Method 1
A permittivity of the first dielectric pattern may be greater than a permittivity of the interlayer insulating layer
Data Source
AI summary
A display apparatus includes a plurality of pixels each including a substrate on which are disposed: an interlayer insulating layer; a driving thin film transistor in which a driving semiconductor layer and a driving gate electrode are each disposed between the substrate and the first interlayer insulating layer; a first capacitor in which a first electrode, a first dielectric pattern and a second electrode are sequentially stacked, the first electrode being connected to the driving gate electrode; and a plurality of contact plugs extended through a thickness of the interlayer insulating layer, with which the driving thin film transistor and the first capacitor are respectively connected to electrodes outside thereof. Lateral surfaces of the first dielectric pattern are covered by the interlayer insulating layer, and the first dielectric pattern within the first capacitor is disposed spaced apart from each of the contact plugs.