Mirror-Symmetric Pixel Cell Layout for Reduced Image Sensor Pitch
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in achieving precise fabrication with sub-micron feature sizes due to corner rounding in patterned photoresist, leading to processing variance and performance issues, particularly in reducing pixel pitch and meeting design rule requirements.
Innovation Solution
The implementation of a multi-substrate image sensor with mirror symmetric pixel cell circuitry layout, where multiple semiconductor substrates are used to form an image sensor package, allowing for reduced pixel pitch and precision control of performance characteristics, such as threshold voltage, by offloading circuitry from one substrate to another, thereby mitigating the effects of corner rounding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional single-substrate pixel cell layout is used, then fabrication is simpler, but corner rounding of photoresist causes processing variance and performance inconsistencies
Solution Approach 1:
The pixel cell circuitry is divided into two separate semiconductor substrates: first substrate containing photosensitive elements and some circuitry, second substrate containing remaining pixel cell circuitry. This segmentation eliminates corner rounding issues by distributing components away from problematic corner regions and allows each substrate to be optimized independently for manufacturing precision.
2Productivity
If pixel pitch is reduced to increase resolution, then image sensor functionality is enhanced, but fabrication precision deteriorates due to corner rounding effects
Solution Approach 1:
The patent transitions from a two-dimensional layout on a single substrate to a three-dimensional stacked architecture using multiple substrates. This dimensional change allows pixel pitch to be reduced while maintaining manufacturing precision, as the vertical stacking provides additional space for circuitry arrangement without constraining the horizontal photoresist patterning process.
3Reliability
If mirror symmetric layout is implemented across multiple substrates, then performance consistency is improved, but device complexity increases
Solution Approach 1:
While the overall architecture uses symmetric distribution of pixel cells across substrates, the circuitry layout within each substrate employs asymmetric arrangements that deliberately avoid corner regions. This asymmetric placement strategy within a symmetric framework achieves performance consistency by eliminating corner rounding effects while managing the complexity of multi-substrate integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of image sensors with reduced pixel pitch while minimizing performance variance and meeting design rule requirements, even at smaller technology nodes, by optimizing the layout and distribution of components across multiple substrates.
Implementation Method 1
The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light
Data Source
AI summary
An image sensor comprising a semiconductor substrate and pixel cell circuitry is described. The semiconductor substrate includes a first side and a second side opposite the first site. The pixel cell circuitry is disposed proximate to the first side of the semiconductor substrate. The pixel cell circuitry includes an arrangement of individual groups of components, each including a reset gate, a source-follower gate, and a row select gate. The individual groups of components included in the pixel cell circuitry includes a first group and a second group adjacent to the first group, and wherein the source-follower gate of the first group is disposed adjacent to the source-follower of the second group.