Imaging Pixel Charge Blocking Layout for Thermal Excitation Noise
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Solution Overview
Problem
Existing imaging devices suffer from noise issues due to charges generated by thermal excitation at the interface between stacked functional layers, which affect image quality, particularly in environments with varying brightness.
Innovation Solution
The imaging device is designed with a specific ratio of intermediate layer thickness (D) to electrode area (S) (D/√S ≥ 0.07) to minimize the impact of thermal excitation charges, along with charge blocking layers to suppress leakage currents and enhance signal charge extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If functional layers are stacked to form a photoelectric conversion element, then photoelectric conversion function is improved, but noise increases due to thermal excitation charges at layer interfaces
Solution Approach 1:
An intermediate layer is introduced between the photoelectric conversion layer and the electrode. This intermediate layer acts as a mediator that suppresses the generation of noise charges through thermal excitation at the interface while allowing signal charges to be efficiently collected, thus resolving the contradiction between maintaining photoelectric conversion function and reducing noise
Solution Approach 2:
The photoelectric conversion element uses a composite structure with multiple functional layers including the photoelectric conversion layer, intermediate layer, and electrode. This composite material structure allows different layers to perform specific functions: the photoelectric conversion layer generates signal charges, while the intermediate layer suppresses thermal excitation charges, achieving both high conversion efficiency and low noise
2Object-generated harmful factors
If intermediate layer thickness is increased to reduce noise, then noise is reduced, but device complexity increases
Solution Approach 1:
Instead of arbitrarily increasing the intermediate layer thickness, the patent optimizes the thickness parameter to satisfy a specific condition (D/√S ≥ 0.07, where D is thickness and S is electrode area). This parameter optimization achieves noise reduction while controlling device complexity through a quantifiable design rule
3Productivity
If charge blocking layer is added to suppress leakage current, then signal charge extraction is improved, but device complexity increases
Solution Approach 1:
The intermediate layer serves multiple functions simultaneously: it suppresses thermal excitation charges (reducing noise), enables efficient signal charge extraction, and can be integrated with charge blocking functionality. This multi-functionality reduces the need for separate dedicated layers, thereby limiting the increase in device complexity while improving productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise, improves signal-to-noise ratio, and maintains high-quality imaging performance across varying light conditions.
Implementation Method 1
a photoelectric conversion layer that is positioned between the first electrode and the second electrode, includes a donor semiconductor material and an acceptor semiconductor material, and generates signal charges
Implementation Method 2
charges generated by thermal excitation at the interface between stacked functional layers
Data Source
AI summary
An imaging device includes pixels. Each of the pixels includes: a lower electrode; an upper electrode that is disposed to face the lower electrode; a photoelectric conversion layer that is positioned between the lower electrode and the upper electrode, includes a donor semiconductor material and an acceptor semiconductor material, and generates signal charges; a charge blocking layer that is positioned between the photoelectric conversion layer and the lower electrode; and a charge accumulation region that is electrically connected to the lower electrode and accumulates the signal charges. D/√S ≥ 0.07 is satisfied, where D is a thickness of the charge blocking layer, and S is an area of the lower electrode in plan view.