Sequentially Coupled Pixel Charge Storage for Faster Readout

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Solution Overview

Problem

Integrated devices for massively-parallel sample analysis are limited by their large size, portability issues, need for skilled operation, high power consumption, and cost, making them unsuitable for point-of-care applications, and they face challenges in efficiently collecting and reading out charge carriers due to limitations in charge transfer rates and readout processes.

Innovation Solution

The integration of multiple charge storage regions within the integrated circuit, allowing for simultaneous or sequential transfer and readout of charge carriers, enhances the frequency of charge collection and reduces the time required for readout processes, improving the efficiency of charge carrier handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single charge storage region is used in integrated photodetectors, then the device structure is simple, but the charge collection frequency is limited and readout time is increased

Engineering Contradiction:

Improvecharge collection frequencyVSAvoidcharge storage region structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the charge storage function into multiple separate charge storage regions (first charge storage region and second charge storage region) instead of using a single storage region. This segmentation allows charge carriers to be collected and transferred in parallel through different pathways, thereby increasing the charge collection frequency and reducing readout time while maintaining manageable device complexity through systematic architecture

Inventive Principle:

Principle #1Segmentation

2Loss of time

If charge carriers are read out sequentially from a single storage region, then the device structure is simple, but the readout process time is increased

Engineering Contradiction:

Improvereadout process timeVSAvoidcharge storage region structure

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

By segmenting the charge storage system into multiple independent charge storage regions with separate transfer pathways to the readout region, the patent enables parallel readout operations. Multiple charge carriers can be transferred simultaneously through different regions, significantly reducing the total readout process time while the modular structure keeps device complexity manageable

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary charge carrier transfer from the photodetection region to the first charge storage region during the integration period, preparing charges for subsequent rapid readout. This preliminary action separates the charge collection phase from the readout phase, allowing optimized timing and reducing overall process time

Inventive Principle:

Principle #10Preliminary action

3Productivity

If multiple charge storage regions are integrated, then charge collection frequency increases, but the device size and complexity increase

Engineering Contradiction:

Improvecharge carrier handling efficiencyVSAvoidintegrated circuit size

Core Design Contradiction:

ProductivityVSVolume of moving object

Solution Approach 1:

The patent arranges multiple charge storage regions and transfer pathways in a vertically stacked or multi-layered configuration rather than spreading them out horizontally. This dimensional reorganization increases charge handling efficiency through parallel pathways while minimizing the footprint and overall device size

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables more frequent charge carrier collection and faster readout processes, enhancing the performance and portability of integrated devices for point-of-care genetic sequencing and personalized medicine applications.

Implementation Method 1

a photodetection region configured to generate charge carriers in response to receiving incident photons

Methodology Applied

Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS12169142B2Integrated circuit with sequentially-coupled charge storage and associated techniques

Publication Date: 2024.12.17 QUANTUM SI INC

AI summary

Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates. Some aspects of the present disclosure relate to techniques for manufacturing and operating integrated circuits according to the other techniques described herein.