Pixel Circuit Clock Feedthrough Compensation for Faster Image Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Image sensor systems face challenges in achieving high-speed operation with low power consumption while minimizing noise sources that degrade image quality, particularly due to issues like aliased thermal noise, integral nonlinearity, differential nonlinearity, and clock feedthrough.
Innovation Solution
The implementation of a pixel circuit with a source follower transistor and a compensation driver circuit that introduces a controlled disturbance voltage onto the column node, along with random selection of CDAC circuit elements and dithering signals, helps reduce noise and improve settling time, while power management techniques like slope-controlled power enable signals minimize power supply disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a single slope ADC architecture is used, then power efficiency and compactness are improved, but conversion speed is limited
Solution Approach 1:
The pixel circuit is segmented into multiple functional blocks: a first driver circuit for pixel data, a second driver circuit for reset/transfer signals, a source follower amplifier, and a capacitively coupled compensation circuit. This segmentation allows each block to operate optimally - the first driver maintains low power while the second driver and compensation circuit actively suppress clock feedthrough to enable faster settling
Solution Approach 2:
The second driver circuit and compensation capacitor perform preliminary action by pre-compensating for clock feedthrough effects before the main conversion process. By capacitively coupling the amplified reset or transfer signal to the column node, the system proactively counteracts anticipated clock feedthrough disturbances, enabling faster settling without increasing power consumption of the primary ADC path
2Speed
If SAR ADC architecture is used for speed benefit, then conversion speed is improved, but clock feedthrough and noise increase
Solution Approach 1:
The invention converts the harmful clock feedthrough signal into a beneficial compensation mechanism. The second driver circuit amplifies the reset or transfer signal and couples it through a capacitor to create a controlled disturbance voltage that precisely counteracts the clock feedthrough effect. What was originally a harmful artifact is transformed into a useful compensation signal that accelerates settling and reduces noise
Solution Approach 2:
A compensation capacitor serves as an intermediary element between the second driver circuit and the column node. This capacitor mediates the interaction by coupling the amplified reset/transfer signal to counteract clock feedthrough effects. The intermediary capacitor enables the compensation mechanism to operate effectively without directly interfering with the primary signal path
3Measurement precision
If pixel settling time is increased to reduce noise, then image quality is improved, but system speed decreases
Solution Approach 1:
The compensation mechanism operates as a feedback system where the second driver circuit monitors the state of the column node and actively injects compensation signals to counteract clock feedthrough effects. This feedback approach enables the system to achieve accurate settling faster, simultaneously improving both image quality and system speed by continuously adjusting to maintain optimal settling conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables image sensor systems to operate at higher speeds with reduced noise and power consumption, improving image quality by minimizing aliased thermal noise, integral and differential nonlinearity, and clock feedthrough, while maintaining efficient power usage.
Implementation Method 1
The second driver circuit is capacitively coupled to the column node through a first capacitor
Data Source
AI summary
A pixel circuit and method for operating the same is disclosed. The circuit includes a first driver circuit coupled to receive an analog pixel data, transfer signal and reset signal. The circuit further includes a source follower transistor having a source terminal coupled to a column node, and a gate terminal coupled to the first driver circuit. The circuit further includes a second driver circuit coupled to receive the transfer signal and the reset signal. The second driver circuit is capacitively coupled to the column node through a first capacitor.