Pixel Circuit Layout for Low-Refresh Display Panel Stability
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Solution Overview
Problem
Display panels experience screen shaking due to increased leakage currents when operating at low refresh frequencies, which is exacerbated by the need for additional space to reduce shaking, hindering high pixel density and resolution.
Innovation Solution
The display panel design incorporates a gate reset transistor and an anode reset transistor with direct channel region connections through a first connection portion in the active layer, along with a reference voltage line connection, reducing the number of via holes and occupying less space, while maintaining stable gate potentials using transistors with double-gate or tri-gate structures and shielding capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the refresh frequency is lowered to reduce power consumption, then power consumption is reduced, but leakage currents increase causing screen shaking
Solution Approach 1:
The pixel circuit is divided into multiple transistors (first reset transistor, second reset transistor, driving transistor, light emission control transistor) with distinct functions. This segmentation allows each transistor to be optimized for specific tasks, improving overall circuit performance and reducing leakage currents at low refresh frequencies without increasing power consumption.
Solution Approach 2:
The patent introduces a time dimension by implementing different operating modes (first operating mode for normal refresh, second operating mode for low refresh frequency). The circuit behavior changes based on the refresh frequency, allowing optimal performance across different operating conditions while maintaining low power consumption and reducing screen shaking.
2Reliability
If additional scan lines are introduced to reduce screen shaking, then screen shaking is reduced, but pixel circuit space increases
Solution Approach 1:
The first reset transistor and second reset transistor are merged into a coordinated reset mechanism that works together to control the pixel circuit. This merging allows the circuit to achieve better reset control and reduce screen shaking without requiring additional scan lines, thereby saving pixel circuit space for higher density.
Solution Approach 2:
The existing scan lines are made multi-functional by having them control multiple transistors within the pixel circuit. The first scan line controls both the first reset transistor and the light emission control transistor, while the second scan line controls the second reset transistor and data writing transistor. This universal usage reduces the need for additional scan lines while maintaining screen stability.
3Reliability
If storage capacitor area is enlarged to reduce screen shaking, then screen shaking is reduced, but pixel circuit space increases
Solution Approach 1:
The patent changes the operational parameters of the pixel circuit by implementing different operating modes with different refresh frequencies. By optimizing the circuit design to handle low refresh frequencies effectively through parameter changes, the need for enlarged storage capacitors is eliminated, maintaining compact pixel circuit space while reducing screen shaking.
4Adaptability or versatility
If pixel circuits are designed for low-frequency operation, then low-frequency driving is enabled, but pixel circuit complexity increases
Solution Approach 1:
The pixel circuit is designed to be dynamic, adapting its behavior based on the refresh frequency. The circuit can operate in different modes (first operating mode for normal refresh, second operating mode for low refresh frequency), allowing it to handle variable operating conditions without requiring a completely different circuit design, thus managing complexity while enabling low-frequency driving.
Data Source
AI summary
Display panel and display device are provided. The display panel includes a base substrate; an active layer on a side of the base substrate; a plurality of pixel circuits arranged in an array along a first direction and a second direction, the first direction intersecting the second direction; and a plurality of first scan lines, a plurality of second scan lines and a plurality of reference voltage lines, all of which extend along the first direction. A pixel circuit of the plurality of pixel circuits includes a gate reset transistor and an anode reset transistor. The gate reset transistor includes a first channel region in the active layer. The first channel region overlaps a first scan line of the plurality of first scan lines in a direction perpendicular to a plane of the base substrate. The anode reset transistor includes a second channel region in the active layer.