Pixel Circuit with Dual Capacitors for Depth Sensing
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Solution Overview
Problem
Existing 3D image sensing systems face inaccuracies in determining image depth due to mismatches in semiconductor device manufacturing and clock signals, as well as excessive common mode voltage affecting the backend amplifier, leading to saturation.
Innovation Solution
A pixel circuit with two capacitors and multiple shutter switches that alternate charging, along with a common mode reset module, to synchronize clock signals and manage common mode voltage, ensuring accurate depth determination and preventing amplifier saturation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel circuit uses a single capacitor to store charge from collection nodes, then the circuit structure is simple, but manufacturing mismatches and clock signal mismatches cause inaccurate depth determination
Solution Approach 1:
The pixel circuit divides the single charge storage function into two separate capacitors (first capacitor and second capacitor). The first capacitor stores charge from the first collection node, while the second capacitor stores charge from the second collection node. This segmentation allows independent charge storage paths that can be alternately read out, eliminating the need for precise matching between manufacturing parameters and clock signals while improving depth determination accuracy.
2Productivity
If the pixel circuit charges both capacitors simultaneously, then the charging process is efficient, but the common mode voltage becomes too large causing backend amplifier saturation
Solution Approach 1:
The pixel circuit implements periodic charging and readout operations for the two capacitors. During the first period, the first capacitor is charged from the first collection node while the second capacitor is discharged to the first output module. During the second period, the second capacitor is charged from the second collection node while the first capacitor is discharged to the second output module. This periodic alternation maintains charging efficiency while keeping the common mode voltage at acceptable levels, preventing backend amplifier saturation.
3Adaptability or versatility
If the pixel circuit uses ambient light during sensing, then the sensor can operate in various lighting conditions, but the common mode voltage increases occupying dynamic range
Solution Approach 1:
The pixel circuit extracts and separates the ambient light signal from the reflected light signal through differential measurement. By storing charges from two different collection nodes in separate capacitors and alternately reading them out, the circuit can compute the difference between the two signals. This extraction method removes the common mode component (ambient light) while preserving the differential component (reflected light), thereby reducing the common mode voltage that occupies the backend amplifier's dynamic range while maintaining adaptability to various lighting conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the accuracy of depth determination by excluding signal components from manufacturing and clock mismatches and limits common mode voltage, preventing amplifier saturation and improving overall performance.
Implementation Method 1
utilizes pixel circuits in a pixel array to receive a reflected light corresponding to the incident light
Data Source
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AI summary
The present application provides a pixel circuit, applied in an image sensing system. The pixel circuit is coupled to a first collection node and a second collection node. The pixel circuit includes a first capacitor; a second capacitor; a first shutter switch coupled between the first capacitor and the first collection node; a second shutter switch coupled between the second capacitor and the second collection node; a third shutter switch coupled between the second capacitor and the first collection node; a fourth shutter switch coupled between the first capacitor and the second collection node; and a common mode reset module coupled to the first capacitor and the second capacitor.