Pixel Circuit Layout With Dual-Gate Control for Display Quality
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Solution Overview
Problem
Existing display devices face challenges in achieving improved display quality due to the complexity of pixel configurations and signal timing within the display apparatus.
Innovation Solution
The display apparatus incorporates a specific pixel configuration with multiple transistors and capacitors, including a first transistor with dual gates, and optimized gate signal timings to enhance display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a complex pixel configuration with multiple transistors and capacitors is used, then display quality is improved, but device complexity increases
Solution Approach 1:
The pixel circuit is divided into multiple functional blocks with distinct transistors (first through seventh transistors) and capacitors (first and second capacitors), each performing specific functions such as data writing, threshold compensation, and light emission control. This segmentation allows for improved display quality through precise control while organizing complexity into manageable functional units
Solution Approach 2:
The patent introduces a dual-gate transistor structure where the first transistor has both a first gate and a second gate that can be controlled independently. This adds a dimensional aspect to the control mechanism, allowing simultaneous control of different circuit functions through separate gate signals, thereby improving display quality without proportionally increasing overall circuit complexity
2Productivity
If multiple gate signals are applied to different transistors during one frame, then signal timing optimization is achieved, but control complexity increases
Solution Approach 1:
The pixel circuit operates through periodic gate signal applications during each frame period. The first gate signal is applied to the second transistor for data writing, while the second gate signal is applied to the fourth transistor for threshold compensation. This periodic, rhythmically structured control achieves optimal timing for multiple functions without creating chaotic control complexity
Solution Approach 2:
The threshold compensation function is performed in advance during the first period before the data writing period. By applying the second gate signal to the fourth transistor beforehand, the circuit prepares the appropriate voltage levels and compensation values prior to data input, optimizing the overall signal timing sequence
Data Source
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AI summary
Each pixel of a display device according to an embodiment of the present invention comprises: a first transistor; a second transistor connected to a first gate of the first transistor and a data line; a third transistor connected to the first gate of the first transistor and a first voltage line; a first capacitor comprising a first electrode connected to the first gate of the first transistor and a second electrode connected to a second terminal of the first transistor; and a second capacitor comprising a first electrode connected to the first voltage line and a second electrode connected to the second terminal of the first transistor, wherein the first electrode of the second capacitor and the first voltage line are arranged on the same layer.