Pixel Circuit Generates Multiple Gate Signals
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Solution Overview
Problem
The increasing number of drivers required to generate various gate signals in display devices leads to higher power consumption and additional space needs, and existing technologies do not effectively address the challenge of generating multiple gate signals from a single source efficiently.
Innovation Solution
A pixel circuit design that generates multiple gate signals from one gate signal by using a combination of transistors and capacitors, including a first transistor, second transistor, third transistor, and a capacitor, which receive clock signals and power voltages to produce write, compensation, and initialization gate signals, reducing the need for separate drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate drivers are used to generate different gate signals, then the display device can provide various gate signals to pixels, but power consumption increases and additional space is required
Solution Approach 1:
The patent combines multiple driver functions into a single driver by generating different gate signals (write gate signal, compensation gate signal, initialization gate signal) from one common gate signal source. This merging approach eliminates the need for separate drivers for each gate signal type, thereby reducing power consumption while maintaining the capability to provide various gate signals to pixels.
Solution Approach 2:
The single driver in the patent is designed to perform multiple functions by generating different types of gate signals (write, compensation, initialization) from a single gate signal. This multi-functional driver replaces what would traditionally require multiple specialized drivers, achieving both versatility in signal generation and efficiency in power consumption.
2Adaptability or versatility
If multiple separate drivers are used to generate different gate signals, then the display device can provide various gate signals to pixels, but additional space is occupied by the drivers
Solution Approach 1:
The patent merges multiple driver circuits into a single integrated driver that can generate all necessary gate signals (write, compensation, initialization) from one common gate signal source. This consolidation significantly reduces the area occupied by driver circuits in the display device while maintaining full functionality for various gate signal generation.
3Use of energy by stationary object
If a single driver generates all gate signals, then power consumption and space are reduced, but the threshold voltage compensation time of the driving transistor is limited
Solution Approach 1:
The patent implements preliminary action by providing a dedicated compensation period during which the compensation gate signal is applied to the pixel before the write gate signal. This preliminary compensation action allows the driving transistor's threshold voltage to be adjusted in advance, ensuring proper operation subsequent to the write operation without extending the overall pixel operation time.
Solution Approach 2:
The patent uses periodic action by dividing the gate signal generation into distinct time periods: initialization period, compensation period, and write period. Each period serves a specific function, and the periodic structure ensures that threshold voltage compensation is performed at appropriate intervals without compromising the overall timing efficiency of the pixel operation.
Data Source
AI summary
A pixel circuit includes a first transistor, a second transistor including a control electrode receiving a write gate signal generated based on clock signals having a duration of M horizontal time, M being a positive integer greater than or equal to 2, a first electrode receiving a data voltage, and a second electrode electrically connected to the first transistor, a third transistor including a control electrode receiving a compensation gate signal generated based on a first next write gate signal applied after the write gate signal is applied, a first and second electrodes electrically connected to the first transistor, and a fourth transistor including a control electrode receiving an initialization gate signal generated based on a previous write gate signal applied before the write gate signal is applied, a first electrode receiving a first initialization voltage, and a second electrode electrically connected to the first transistor.