Pixel Circuit Layout With Internal Reference Voltage for Flexible Displays
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Solution Overview
Problem
Flexible display devices face reliability and lifespan issues due to numerous wiring lines that can crack during flexing, reducing aspect ratio and design freedom, and increasing the risk of damage.
Innovation Solution
A pixel design with minimized connection lines, using a rigid island structure and internal voltage generation, allowing for a wavy or coiled wiring shape and reduced potential failure points, with each pixel row controlled by a single scan line and emission line, eliminating the need for external reference voltage lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If numerous wiring lines are connected to each pixel unit, then the pixel can be fully controlled and driven, but the space between pixels is crowded and the aspect ratio is restricted
Solution Approach 1:
Multiple wiring lines (scan lines and emission lines) are merged into a single shared line that serves multiple pixel rows simultaneously. The shared line is sequentially controlled to provide scanning and emission signals to different rows at different time periods, reducing the total number of wiring lines while maintaining full pixel control capability.
Solution Approach 2:
The shared wiring line performs multiple functions: it serves as both a scan line for one row and an emission line for another row at different time periods. This multi-functional approach allows a single physical line to replace what would traditionally require multiple dedicated lines, thereby freeing up space between pixels.
2Adaptability or versatility
If numerous wiring lines are connected to each pixel unit, then comprehensive pixel control is achieved, but the number of potential failure points increases due to cracking during flexing
Solution Approach 1:
Multiple wiring lines are merged into a single shared line, reducing the total number of wiring lines in the display device. Fewer wiring lines mean fewer potential failure points from cracking during flexing, while the shared line is sequentially controlled to maintain full pixel control capability through time-multiplexed signaling.
Solution Approach 2:
Each pixel row is equipped with internal circuitry including storage capacitors and transistors that can autonomously hold and generate necessary control signals during their active period. This self-service capability allows the pixel row to maintain operation even when the shared wiring line is temporarily dedicated to other rows, reducing the need for continuous external signaling and simplifying the wiring structure.
3Adaptability or versatility
If numerous wiring lines are connected to each pixel unit, then full pixel functionality is maintained, but the aperture ratio of the display panel is reduced
Solution Approach 1:
Multiple wiring lines are merged into a single shared line that is sequentially allocated to different pixel rows. This consolidation dramatically reduces the total wiring line count across the display panel, freeing up significant space that can be reallocated to increase the aperture ratio while maintaining full pixel functionality through time-multiplexed control.
Solution Approach 2:
The control approach transitions from spatial multiplexing (multiple simultaneous wiring lines) to temporal multiplexing (single line used at different times). By adding the time dimension to the control strategy, the spatial requirement for multiple wiring lines is eliminated, allowing more area to be dedicated to the aperture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances flexibility, reliability, and lifespan by reducing the number of wiring lines, improving aperture ratio, and minimizing the risk of damage during stretching and flexing.
Implementation Method 1
a light emitting diode; a driving transistor which includes a gate electrode connected to a first node, is connected between a high potential voltage line and a second node, configured to generate a driving current flowing from the high potential voltage line to a low potential voltage line by means of the light emitting diode
Data Source
AI summary
A pixel can include a light emitting diode; a driving transistor including a gate electrode connected to a first node between a high potential voltage line and a second node, the driving transistor being configured to drive the light emitting diode; a storage capacitor connected between the first node and a third node; a first transistor connected between the third node and a data line, the first transistor including a gate electrode connected to a scan signal line; a second transistor connected between the first node and the second node, and including a gate electrode connected to the scan signal line; a third transistor connected between the third node and a fourth node, the third transistor including a gate electrode connected to an emission signal line. Also, the pixel can include a voltage divider configured to internally generate a reference voltage and output the reference voltage to the fourth node.