Pixel Circuit Latch Sub-Circuit for Static Image Power Reduction
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Solution Overview
Problem
AMOLED displays face high power consumption when showing fixed-grayscale static pictures, as they require repeated data signal refreshes across multiple frames.
Innovation Solution
A pixel circuit with an input control sub-circuit, switch control sub-circuit, latch sub-circuit, and light-emitting sub-circuit is implemented, where the switch control sub-circuit controls the conductive time periods of the latch sub-circuit terminals with the first node based on a switch control signal, allowing data signal loading only in the first frame and maintaining switch control signals of the same duty cycle across frames, reducing the need for repeated data signal refreshes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pixel circuit repeatedly refreshes the data signal on the data signal terminal within display time of each frame, then the display continuity is ensured, but the power consumption of the pixel circuit increases
Solution Approach 1:
The data signal is written into the storage capacitor during the writing phase (first time period) before the display phase. This preliminary action stores the data signal in advance, eliminating the need for repeated refreshes during subsequent frames while maintaining display continuity through the stored signal
Solution Approach 2:
The circuit implements periodic writing of the data signal at specific intervals (once per frame or at predetermined moments) rather than continuous refresh. The storage capacitor holds the signal between periodic updates, reducing the frequency of refresh operations and thereby lowering power consumption while ensuring display continuity
Data Source
AI summary
A pixel circuit and a driving method thereof, a display panel and a display device are disclosed. The pixel circuit includes an input control sub-circuit, a switch control sub-circuit, a latch sub-circuit and a light-emitting sub-circuit. The input control sub-circuit writes a data signal into a first node under control of the gate signal terminal. The switch control sub-circuit conducts a first terminal or a second terminal of the latch sub-circuit with the first node under control of a switch signal control terminal. The latch sub-circuit outputs a high-level signal to the first node, when the first node is conductive with the first terminal and outputs a low-level signal to the first node, when the first node is conductive with the second terminal. The light-emitting sub-circuit emits light when the first node is supplied with the high-level signal.