Pixel Circuit Biasing for Low-Noise Solid-State Imaging
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Solution Overview
Problem
In existing solid-state imaging devices, the longer wiring lengths between pixels and analog-to-digital converters on different substrates lead to noise interference with weak analog pixel signals.
Innovation Solution
A solid-state imaging element with a pixel circuit that includes a first transistor for amplifying pixel signals, a second transistor for inputting a reference signal, and a third transistor for outputting bias current to the first and second transistors, thereby reducing noise by shortening wiring lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If pixels and analog-to-digital converter are arranged on different substrates, then device integration is achieved, but wiring length increases and noise interference occurs
Solution Approach 1:
The device is divided into two substrates: a first substrate containing pixels and a second substrate containing the analog-to-digital converter. This segmentation allows independent optimization of each substrate's function while maintaining overall system integration, resolving the contradiction between device integration and noise interference by separating sensitive analog pixel circuits from digital processing circuits.
Solution Approach 2:
A third substrate is introduced as an intermediary between the first substrate (pixels) and the second substrate (analog-to-digital converter). This intermediate layer provides a buffer zone that reduces direct electromagnetic coupling and noise transmission, allowing the system to maintain integration benefits while minimizing noise interference through the mediating substrate structure.
2Object-affected harmful factors
If wiring length is reduced, then noise interference is minimized, but substrate integration is compromised
Solution Approach 1:
The problem is solved by transitioning from a two-substrate configuration to a three-substrate configuration, adding a vertical dimension to the substrate arrangement. This dimensional change allows the analog-to-digital converter to be positioned on a separate substrate while maintaining optimized wiring connections, thereby reducing noise interference without compromising substrate integration.
3Reliability
If analog pixel signal is transmitted over long wiring, then signal level remains weak, but noise susceptibility increases
Solution Approach 1:
The signal transmission path is segmented across three substrates, with the analog-to-digital converter isolated on the second substrate. This segmentation creates distinct functional zones that minimize the length of analog signal wiring while maintaining reliable signal transmission through optimized inter-substrate connections, thereby reducing noise susceptibility.
Solution Approach 2:
The third substrate acts as an intermediary that facilitates reliable analog signal transmission from the first substrate to the second substrate while providing electromagnetic shielding and noise isolation. This intermediate layer maintains signal integrity over the necessary transmission distance without increasing noise susceptibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces noise interference in the signal transmission, enhancing the quality of the pixel signals and improving the overall performance of the solid-state imaging device.
Implementation Method 1
a pixel signal being generated by a photoelectric converter performing photoelectric conversion on light that has entered a pixel
Data Source
AI summary
A solid-state imaging element (1) includes a pixel circuit (20) in which a first transistor (26) that amplifies a pixel signal is arranged, the pixel signal being generated by a photoelectric converter performing photoelectric conversion on light that has entered a pixel. The pixel circuit (20) includes a second transistor (27) into which a reference signal is input from a reference signal generator, and a third transistor (28) that outputs bias current to the first transistor (26) and the second transistor (27).