Pixel Driving Circuit With Capacitive Compensation for LTPO Flicker

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Display panels using Low Temperature Polycrystalline Oxide (LTPO) technologies suffer from leakage currents and afterimage/flicker issues due to parasitic capacitance affecting the gate-source voltage difference of driving transistors, leading to inconsistent display performance.

Innovation Solution

A pixel driving circuit is designed with specific capacitor configurations and transistor arrangements, including a driving transistor, data write circuit, threshold compensation circuit, and capacitors, to stabilize the gate-source voltage difference, reducing leakage currents and improving display stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If LTPO technologies are used to reduce leakage currents, then leakage current is reduced, but parasitic capacitance causes afterimage and flicker issues

Engineering Contradiction:
Improveleakage currentVSAvoiddisplay stability
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent extracts and compensates for the parasitic capacitance effect by introducing a dedicated compensation capacitor (Cp) that specifically targets the parasitic capacitance between the gate and source of the driving transistor. This separates the leakage current reduction function (handled by LTPO) from the parasitic capacitance compensation function (handled by Cp), allowing each to address its specific issue without interfering with the other.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The compensation capacitor Cp acts as an intermediary element that mediates between the parasitic capacitance effect and the driving transistor's gate-source voltage. By introducing this intermediate component, the patent creates a compensation mechanism that counteracts the parasitic capacitance-induced voltage changes, thereby eliminating afterimage and flicker while preserving the leakage current reduction benefits of LTPO.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If parasitic capacitance is present in the gate-source voltage difference, then leakage currents occur, but compensation mechanisms increase circuit complexity

Engineering Contradiction:
Improveleakage currentVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies local quality by introducing compensation capacitors only at specific critical nodes where parasitic capacitance has the most significant impact - specifically at the gate-source junction of the driving transistor. Rather than implementing a global compensation mechanism across the entire pixel circuit, the solution locally targets the specific location where parasitic capacitance causes afterimage and flicker, thereby minimizing the increase in circuit complexity while effectively addressing the leakage current issue.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12555538B2Pixel driving circuit and display panel
Publication Date: 2026.02.17 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12555538B2 patent drawing
  • US12555538B2 patent drawing
  • US12555538B2 patent drawing

AI summary

A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.