Pixel Circuit Layout for Uniform Luminance in Large-Area Displays
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Solution Overview
Problem
Current display devices face challenges in maximizing the display area while minimizing defects such as horizontal lines due to uneven luminance caused by parasitic capacitance deviations between odd-numbered and even-numbered pixel circuit rows.
Innovation Solution
The display device incorporates a substrate with specific display areas and layers, including pixel and driving circuit portions, bridge lines, and dummy circuit portions, which overlap each other in a strategic manner to reduce parasitic capacitance deviations and enhance luminance uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pixel circuit rows are arranged in overlapping display areas to increase display area, then the display area is increased, but parasitic capacitance deviations occur between odd-numbered and even-numbered rows causing luminance uniformity issues
Solution Approach 1:
The patent applies local quality by introducing dummy circuit portions specifically in even-numbered pixel circuit rows that overlap with bridge lines, while odd-numbered rows have different overlapping patterns. This creates localized compensation for parasitic capacitance in specific rows without affecting the overall display area configuration. The dummy circuits are strategically placed only where needed to balance the parasitic capacitance deviations between alternating rows.
2Manufacturing precision
If pixel circuit rows overlap bridge lines to reduce parasitic capacitance, then luminance uniformity is improved, but device complexity increases due to additional dummy circuit portions
Solution Approach 1:
The patent segments the pixel circuit rows into odd-numbered and even-numbered groups with different configurations. Even-numbered rows include dummy circuit portions while odd-numbered rows have different overlapping arrangements. This segmentation allows targeted parasitic capacitance compensation only in the rows that need it, rather than complicating all rows uniformly, thus reducing overall device complexity while maintaining luminance uniformity.
Data Source
AI summary
A display device includes: a substrate including a first display area, a second display area, and a third display area which are arranged along a row direction; a first pixel row on the substrate, extending in the row direction, and including first pixel circuit portions overlapping the second and third display areas; a second pixel row extending in the row direction and including second pixel circuit portions overlapping the second display area; display elements overlapping the first display area; and bridge lines adjacent to the second pixel circuit row, overlapping the second display area, and connecting the first pixel circuit portions and the display elements.


