Pixel Circuit Memory Capacitor Reduces Charging Path Impedance
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Solution Overview
Problem
Display devices with high impedance in the charging path due to numerous control elements result in high power consumption, especially when displaying still images, as they require repeated updating of pixel voltages, leading to inefficiency in power usage.
Innovation Solution
The display device incorporates a pixel circuit with a pixel control unit, switching units, an inverter, memory capacitors, and a pixel capacitor, which allows for reduced impedance during refreshing processes by enabling the inverter to maintain pixel voltages without additional switching units, thereby conserving power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If memory in pixel (MIP) circuits are used to store pixel voltages for still images, then power consumption is reduced by avoiding repeated updating operations, but the pixel circuit requires a number of control elements that increase impedance on the charging path and result in high power consumption
Solution Approach 1:
The patent extracts and removes unnecessary control elements from the pixel circuit. Specifically, it eliminates the need for ELVDD connection control switches and reduces the number of capacitors from two to one, thereby reducing impedance on the charging path while maintaining the MIP functionality for power savings during still image display
Solution Approach 2:
The patent segments the pixel circuit into functional blocks with simplified control. The pixel circuit is divided into the pixel control unit, switching units, inverter, and memory capacitor, allowing independent optimization of each segment to reduce overall complexity while maintaining MIP operation
2Ease of operation
If numerous control elements are used in the pixel circuit to control the display device, then the display device can be controlled precisely, but the impedance on the charging path increases resulting in high power consumption
Solution Approach 1:
The patent removes redundant control elements that contribute to high impedance. By eliminating unnecessary switches and reducing capacitor count, the charging path impedance is reduced while the essential control functions are preserved through the streamlined pixel control unit and switching units
3Manufacturing precision
If pixels are updated separately and sequentially according to image data, then the display device can generate desired images, but power is wasted when displaying still images with repeated updating operations
Solution Approach 1:
The patent implements preliminary action by storing the pixel voltage data in the memory capacitor during the writing phase. This allows the pixel to be refreshed from the stored voltage without repeated updating operations during still image display, maintaining image quality while reducing power consumption
Solution Approach 2:
The patent uses periodic action by implementing a refresh mechanism where the pixel circuit is updated only periodically rather than continuously. The pixel control unit manages periodic refreshing from the memory capacitor, eliminating wasted power from continuous updates while maintaining display quality
Data Source
AI summary
A pixel circuit includes a pixel control unit, a first switching unit, a second switching unit, an inverter, a memory capacitor, and a pixel capacitor. The pixel control unit is coupled to a source line and a gate line. The first switching unit has a first terminal coupled to the pixel control unit, and a second terminal. The inverter has an input terminal coupled to the second terminal of the first switching unit, and an output terminal. The memory capacitor is coupled to the first terminal of the first switching unit and receives a first voltage or a second voltage higher than the first voltage. The second switching unit has a first terminal coupled to the pixel control unit, and a second terminal coupled to the output terminal of the inverter. The pixel capacitor is coupled to a common line and the output terminal of the inverter.


