Pixel Circuit Selective Binning via Reset Transistor

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Solution Overview

Problem

Existing pixel arrays face challenges in efficiently performing charge summation or averaging in the analog domain, which requires significant processing resources and increases power usage, and also struggle with variable conversion gain and selective binning of floating diffusion regions without adding transistors, affecting fill factor and dynamic range.

Innovation Solution

The solution involves connecting the reset transistor of one pixel circuit to the floating diffusion region of another, allowing for optional electrical connection of neighboring pixel circuits' storage regions, enabling selective binning and variable conversion gain without adding transistors, thus allowing for summation, averaging, and programmable conversion gain in the analog domain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If additional transistors are added to enable selective binning and variable conversion gain, then binning functionality is improved, but device complexity and fill factor are worsened

Engineering Contradiction:

Improveselective binning capabilityVSAvoidtransistor count

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The reset transistor is designed to perform multiple functions: its primary function of resetting the floating diffusion region is maintained, while additionally serving as a switching element for selective binning operations. By controlling the reset transistor through different signal timings, the same hardware component enables both normal pixel operation and binned pixel operation, eliminating the need for dedicated binning transistors.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The pixel circuit uses its own existing reset transistor to perform the binning function that would traditionally require separate dedicated circuitry. The reset transistor essentially serves itself by being repurposed as a binning switch, allowing the pixel to perform binning operations using components already present in the standard pixel circuit design.

Inventive Principle:

Principle #25Self-service

2Adaptability or versatility

If additional transistors are added to enable selective binning and variable conversion gain, then binning functionality is improved, but fill factor is worsened

Engineering Contradiction:

Improveselective binning capabilityVSAvoidfill factor

Core Design Contradiction:

Adaptability or versatilityVSArea of moving object

Solution Approach 1:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The binning control functionality is merged with the existing reset transistor control mechanism. By combining the binning switch function with the reset transistor's existing control terminal, the patent integrates multiple functions into a single component, thereby saving pixel area and maintaining high fill factor.

Inventive Principle:

Principle #5Merging (Combining)

3Manufacturing precision

If digital domain processing is used for binning operations, then manufacturing precision is maintained, but processing speed and power consumption are worsened

Engineering Contradiction:

Improvecharge summation accuracyVSAvoidbinning processing speed

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent replaces digital domain processing with analog domain processing for binning operations. Instead of converting charges to voltages, processing them digitally, and converting back, the invention performs charge summation directly in the analog domain by electrically connecting floating diffusion regions before readout. This substitution of processing domain maintains precision while dramatically improving speed and reducing power consumption.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces analog charge summation as an intermediary step between charge accumulation and digital processing. By summing charges in the analog domain through electrical connection of floating diffusion regions, the system creates an intermediate analog signal that preserves precision while enabling faster, lower-power processing compared to full digital conversion and computation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces processing resources and power usage by enabling charge summation and averaging in the analog domain, while maintaining or improving the fill factor and dynamic range by allowing for selective binning and variable conversion gain without increasing transistor count.

Implementation Method 1

a photodiode) and a transfer transistor. The pixel circuit also includes readout circuitry, including a storage region configured as a floating diffusion region

Methodology Applied

Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS8130302B2Methods and apparatus providing selective binning of pixel circuits

Publication Date: 2012.03.06 APTINA IMAGING CORP

AI summary

A pixel circuit configured for optionally connecting the floating diffusion region of the pixel circuit to a floating diffusion region of another pixel circuit. Methods of using the pixel circuit include averaging or summing multiple photosensor outputs in the combined floating diffusion regions, varying the conversion gain of a pixel circuit floating diffusion region, and utilizing multiple readout circuits to readout charges transferred from a single photosensor to the combined floating diffusion regions. A method of window-of-interest averaging that utilizes the combined floating diffusion regions is also disclosed.