Pixel Circuit Initialization for Residual Image Suppression

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Solution Overview

Problem

Display devices experience momentary residual images due to hysteresis in driving transistors, particularly when transitioning from low to high luminance images.

Innovation Solution

The implementation of a pixel structure with multiple transistors and power lines, including initialization and bias transistors, that are controlled by specific scan and emission control signals to manage the driving current and prevent hysteresis effects, such as a first transistor connected to a gate electrode and power lines, a light emitting element connected to the power lines, and additional transistors for data and scan line control, ensuring the driving transistor is initialized and biased correctly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If a driving transistor is used to control current supply to light emitting elements, then luminance control is achieved, but momentary residual images occur due to hysteresis when transitioning from low to high luminance

Engineering Contradiction:
Improveluminance controlVSAvoidresidual image phenomenon
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

The patent applies preliminary action by initializing the gate electrode voltage of the driving transistor to a predetermined voltage level before displaying high luminance content. This pre-initialization step prevents hysteresis effects from causing residual images when transitioning from low to high luminance states, thereby eliminating the harmful effect while preserving luminance control capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter of the gate electrode dynamically - maintaining it at a first voltage level during low luminance display and initializing it to a predetermined voltage level before high luminance display. This parameter change approach allows the system to adapt to different operating conditions and prevent residual image phenomena while maintaining effective luminance control

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple transistors and control signals are added to manage transistor states, then hysteresis effects are minimized, but device complexity increases

Engineering Contradiction:
Improvehysteresis minimizationVSAvoidtransistor and control signal management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The initialization transistor serves multiple functions: it initializes the gate electrode voltage to prevent hysteresis effects, and can also be used to control the overall on/off state of the pixel. By making this single transistor multi-functional, the patent reduces the need for additional dedicated control transistors, thereby minimizing device complexity while still achieving reliable hysteresis control

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the initialization function with the existing pixel circuit structure by using the initialization transistor to serve both as a reset element and as part of the current control pathway. This consolidation approach integrates hysteresis mitigation into the existing device architecture without requiring completely separate control mechanisms, thus limiting the increase in device complexity

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240386849A1Pixel and display device including the same
Publication Date: 2024.11.21 SAMSUNG DISPLAY CO LTD
  • US20240386849A1 patent drawing
  • US20240386849A1 patent drawing
  • US20240386849A1 patent drawing

AI summary

A pixel includes: a first transistor including a gate electrode connected to a first node, a first electrode connected to a first power line for receiving a first driving power voltage via a second node, and a second electrode connected to a third node; a light-emitting element including a first electrode connected to the third node, and a second electrode connected to a second power line; a second transistor connected between a data line and the second node, and including a gate electrode connected to a first scan line; and a third transistor connected between the first node and a third power line for receiving an initialization power voltage. The second transistor is set to a turn-on state during at least a portion of a turn-on period of the third transistor. The initialization power voltage is set to be lower than a data signal.