Pixel Circuit Segmentation for Display Device Power and Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display devices of the pulse-width modulation (PWM) type face challenges in miniaturization, low power consumption, and high image quality due to the need for medium-voltage or high-voltage transistors and SRAM memory in the pixel circuit.
Innovation Solution
A display device with a pixel circuit that includes a capacitor for holding charge, a charge/discharge circuit with first and second switching elements for charging and discharging the capacitor, and a control circuit with a third switching element for controlling the charge/discharge circuit based on pixel data and display timing signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If medium-voltage or high-voltage transistors are used in the pixel circuit to drive the liquid crystal element, then the liquid crystal element can be properly driven, but the transistor size and power consumption increase
Solution Approach 1:
The pixel circuit is segmented into two functional parts: a low-voltage control circuit that operates at logic voltage levels (reducing transistor size and power consumption) and a high-voltage charge/discharge circuit that operates at liquid crystal drive voltage levels (ensuring proper element operation). This segmentation allows each part to use appropriately-sized transistors for its voltage domain.
Solution Approach 2:
A voltage conversion mechanism acts as an intermediary between the low-voltage control circuit and the high-voltage charge/discharge circuit. The control circuit generates control signals that are converted to appropriate voltage levels for the charge/discharge circuit, enabling the liquid crystal element to be driven without requiring all transistors to operate at high voltage.
2Reliability
If SRAM memory is included in the pixel circuit to store pixel data, then pixel data can be retained, but the circuit area and power consumption increase
Solution Approach 1:
The data retention function is extracted from the complex SRAM memory structure and implemented using a simple capacitor that stores pixel data voltage levels. This capacitor-based memory element retains pixel data without requiring the six-transistor SRAM configuration, significantly reducing circuit area while maintaining data retention capability.
Solution Approach 2:
The patent uses a simple capacitor instead of a complex SRAM memory cell. The capacitor provides sufficient data retention for the display refresh period without requiring the more complex and power-intensive SRAM structure, effectively using a simpler, less expensive storage element for the required duration.
3Reliability
If high-voltage transistors are used throughout the pixel circuit, then the liquid crystal element can be driven, but power consumption increases
Solution Approach 1:
The pixel circuit is segmented into a low-voltage control section and a high-voltage charge/discharge section. The control circuit operates at low voltage (logic voltage levels) minimizing power consumption, while only the charge/discharge circuit operates at high voltage when needed to drive the liquid crystal element, reducing overall power consumption compared to using high-voltage transistors throughout.
Solution Approach 2:
The high-voltage charge/discharge circuit operates periodically based on display timing signals, charging the capacitor during specific time intervals and discharging it when needed. This periodic operation at high voltage, rather than continuous high-voltage operation, reduces average power consumption while maintaining reliable liquid crystal element driving.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables miniaturization, reduces power consumption, and enhances image quality by optimizing the pixel circuit with a combination of low-voltage and medium-voltage transistors, while eliminating the need for SRAM memory.
Implementation Method 1
a capacitor that holds a charge according to the voltage supplied to the display element
Implementation Method 2
a first switching element that controls charging of the capacitor
Implementation Method 3
a second switching element that controls discharging of the capacitor
Data Source
AI summary
A display device capable of achieving miniaturization, lower power consumption, and higher image quality is provided. A display device includes a plurality of pixels. The pixels each include a display element and a pixel circuit that controls a voltage supplied to the display element. The pixel circuit includes a capacitor that holds a charge according to the voltage supplied to the display element, a charge/discharge circuit that charges and discharges the capacitor, and a control circuit that controls the charge/discharge circuit. The charge/discharge circuit includes a first switching element that controls charging of the capacitor and a second switching element that controls discharging of the capacitor. The control circuit includes a third switching element that controls on or off of at least one of the first switching element and the second switching element on a basis of at least one of pixel data or a display timing signal.