Pixel Circuit Segmentation for Leakage Current Reduction
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Solution Overview
Problem
Organic light-emitting display devices experience flicker when operating at low-frequency driving modes due to leakage currents through transistors, which degrade perceived display quality by changing the voltage at the gate terminal of the driving transistor.
Innovation Solution
The pixel circuit incorporates independent signal generating circuits to control the first and second gate signals and initialization signals, with the first compensation and initialization transistors being turned on during higher frequency periods and the second compensation and initialization transistors during lower frequency periods, ensuring the nodes between them are not in a floating state, thereby minimizing leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single compensation transistor and initialization transistor are used in the pixel circuit, then the device complexity is reduced, but leakage current increases causing flicker in low-frequency driving mode
Solution Approach 1:
The pixel circuit divides the compensation function into two separate compensation transistors (first compensation transistor connected to gate terminal, second compensation transistor connected to terminal of driving transistor) and the initialization function into two separate initialization transistors. This segmentation allows each transistor to be controlled independently with different gate signals, preventing simultaneous conduction and reducing leakage current that causes flicker in low-frequency driving mode.
2Loss of energy
If the compensation transistor and initialization transistor are turned off to save power, then energy consumption is reduced, but leakage current still flows causing voltage change at gate terminal
Solution Approach 1:
The circuit dynamically controls the four transistors using different gate signals with different frequencies and phases. The first compensation transistor is controlled by a first gate signal, the second by a second gate signal, and similarly for initialization transistors. This dynamic control ensures that at least one transistor in each pair remains conductive to maintain voltage stability while managing power consumption effectively.
Solution Approach 2:
The gate signals are applied periodically with specific frequencies and phases. The first and second gate signals have different frequencies, creating a periodic switching pattern where transistors are turned on and off in a coordinated manner. This periodic action prevents continuous leakage current while maintaining stable voltage at the gate terminal during low-frequency driving mode.
3Productivity
If transistors are turned off during non-light-emitting periods to reduce power consumption, then energy efficiency improves, but floating nodes cause leakage current and flicker
Solution Approach 1:
The circuit applies gate signals in advance to prevent the floating node condition. By controlling the transistors with predetermined gate signals of different frequencies and phases, the circuit ensures that nodes remain properly biased even during non-light-emitting periods, preventing the formation of floating nodes that would cause leakage current and subsequent flicker.
Data Source
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AI summary
Disclosed is a pixel circuit which includes: a main circuit including: a driving transistor that includes a gate terminal connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node; and an organic light-emitting element connected to the driving transistor and configured to control the organic light-emitting element by controlling a driving current corresponding to a data signal applied via a data line to flow into the organic light-emitting element; and a sub circuit including: a first compensation transistor that includes a gate terminal configured to receive a first gate signal, a first terminal connected to the first node, and a second terminal connected to a fourth node; and a second compensation transistor that includes a gate terminal configured to receive a second gate signal, a first terminal connected to the fourth node, and a second terminal connected to the third node.