Pixel Circuit with Segmented Transistors for High-Resolution Displays

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Solution Overview

Problem

Current display devices face challenges in achieving high resolution while maintaining image clarity and vividness, particularly in densely packed pixel arrays.

Innovation Solution

The proposed pixel design includes a pixel circuit with three transistors and two capacitors, along with a light emitting element, which performs sequential operations such as initialization, threshold voltage compensation, data writing, and light emitting during one frame, utilizing specific voltage levels and signal timings to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If more pixels are provided in a limited area to increase resolution, then image clarity is improved, but pixel density increases causing difficulty in maintaining image vividness and increasing manufacturing complexity

Engineering Contradiction:
Improveimage clarityVSAvoidpixel density
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The pixel circuit is segmented into three transistors (first transistor for current control, second transistor for data writing, third transistor for power supply) and two capacitors (first capacitor for gate voltage storage, second capacitor for node voltage storage), dividing functions across multiple components to manage complexity while maintaining high resolution

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different parts of the pixel circuit at different times (low level first power voltage during initialization, high level first power voltage during other operations; low level second power voltage during light emitting, high level during other periods) to optimize performance for high-density pixel arrays

Inventive Principle:
Principle #3Local quality

2Reliability

If sequential operations (initialization, threshold voltage compensation, data writing, light emitting) are performed during one frame, then operation reliability is improved, but operation time is increased

Engineering Contradiction:
Improveoperation reliabilityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Initialization operation is performed first to set the light emitting element to an initial state before subsequent operations (threshold voltage compensation, data writing, light emitting), ensuring reliable operation by preparing the circuit in advance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pixel circuit performs sequential operations in periodic phases during each frame period, with each operation (initialization, compensation, data writing, light emitting) occupying a specific time window, allowing complete operational cycles to finish within one frame time

Inventive Principle:
Principle #19Periodic action

3Illumination intensity

If simultaneous light emission is achieved during light emitting period, then image vividness is improved, but power consumption increases

Engineering Contradiction:
Improveimage vividnessVSAvoidpower consumption
Core Design Contradiction:
Illumination intensityVSUse of energy by moving object

Solution Approach 1:

The second power voltage is changed to a low level during the light emitting period while maintaining high level during other periods, and the first power voltage is changed to a low level during initialization while maintaining high level during other operations, optimizing power consumption for simultaneous light emission

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250061840A1Pixel and display device including the same
Publication Date: 2025.02.20 SAMSUNG DISPLAY CO LTD
  • US20250061840A1 patent drawing
  • US20250061840A1 patent drawing
  • US20250061840A1 patent drawing

AI summary

A pixel includes a first transistor including a gate terminal connected to a first node, a first terminal, and a second terminal connected to a second node, a second transistor including a gate terminal which receives a first gate signal, a first terminal which receives a data voltage, and a second terminal connected to the first node, a third transistor including a gate terminal which receives a second gate signal, a first terminal which receives a first power voltage, and a second terminal connected to the second terminal of the first transistor, a first capacitor including first and second terminals connected to the first and second nodes, respectively, a second capacitor including a first terminal which receives the first power voltage, and a second terminal connected to the second node, and a light emitting element connected to the second node and which receives a second power voltage.