Pixel Circuit Series Transistor Readout

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Solution Overview

Problem

Existing CMOS image sensor pixel circuits face challenges in reducing the number of transistors while maintaining read speed, leading to slow pixel readout and limitations in voltage application that affect charge transfer efficiency.

Innovation Solution

The proposed solution involves a circuit configuration where two transistors are coupled in series between column lines, allowing simultaneous read and reset operations within a column, and utilizing variable voltage reset transistors to manage dark current and improve charge transfer efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the number of transistors in each pixel circuit is reduced to two or less by using common reset and read transistors for multiple photodiodes, then the transistor count per photodiode is reduced, but the read speed of pixels becomes slow

Engineering Contradiction:
Improvenumber of transistors per photodiodeVSAvoidpixel readout speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The pixel circuit is divided into multiple independent pixel units, each with its own sense node and transfer transistor. Multiple photodiodes (e.g., PD1-PD4) are grouped into separate pixel circuits that can be read out concurrently through different column lines, enabling parallel readout operations that maintain high speed while using only 2 transistors per photodiode

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reset transistor and read transistor are designed to serve multiple photodiodes simultaneously. The reset transistor can reset multiple sense nodes, and the read transistor can read out signals from multiple photodiodes through different column lines, making these transistors universal components that reduce overall circuit complexity without sacrificing readout speed

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If conventional pixel circuits are used with limited voltage application, then the circuit structure is simple, but the charge transfer efficiency is reduced

Engineering Contradiction:
Improvecircuit structureVSAvoidcharge transfer efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The pixel circuit incorporates dynamically controllable voltage levels at the sense node through the reset transistor. The sense node voltage can be adjusted between different levels (e.g., first voltage level for reset, second voltage level for reading) depending on the operational phase, enabling optimal charge transfer efficiency while maintaining a simple 2-transistor structure

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes the voltage parameter at the sense node dynamically during operation. By applying different voltage levels to the sense node during different phases (reset phase vs. read phase), the charge transfer efficiency is improved without requiring additional transistors or complex circuitry

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables faster readout of pixels by allowing concurrent read and reset operations, reduces transistor threshold voltage, and enhances the charge-to-voltage factor, thereby improving the overall performance of the image sensor.

Implementation Method 1

a first transistor having its control node coupled to a first sense node, the first sense node being coupled to at least one photodiode

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS9706147B2Pixel circuit with fast read out
Publication Date: 2017.07.11 STMICROELECTRONICS INT NV
  • US9706147B2 patent drawing
  • US9706147B2 patent drawing
  • US9706147B2 patent drawing

AI summary

An image sensor includes a first photodiode with associated first sense node and a second photodiode with associated second sense node. A first transistor has its control node coupled to the first sense node and a second transistor has its control node coupled to the second sense node. The conduction paths (for example, source-drain paths) of the first and second transistors are coupled in series between first and second column lines associated with a column of the image sensor array. Switches control connection of the first and second column lines in two modes: one mode where a voltage is applied to the first column line and data from one of the photodiodes is read out by the second column line; and another mode where a voltage is applied to the second column line and data from the other of the photodiodes is read out by the first column line.