Pixel Circuit Subtraction Unit for PWM Voltage Error Compensation
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Solution Overview
Problem
Electronic devices with pixel circuits face voltage errors due to parasitic capacitance in reset transistors, which affect pulse-width modulation (PWM) emission times.
Innovation Solution
Incorporating a pixel circuit with a subtraction unit that receives comparison signals from two comparators, generating a subtraction signal to control semiconductor elements, thereby reducing voltage errors by compensating for timing shifts caused by parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a reset transistor is used to reset voltage value on the pixel circuit, then the pixel circuit can be reset, but parasitic capacitance of the reset transistor causes voltage error
Solution Approach 1:
The patent extracts the harmful parasitic capacitance effect from the reset transistor by introducing a separate compensation capacitor that measures and compensates for the voltage error caused by the parasitic capacitance, thereby maintaining the reset function while eliminating the voltage accuracy degradation
Solution Approach 2:
The patent implements a feedback mechanism where the voltage error caused by parasitic capacitance is measured during the reset process and then compensated by adjusting the reset voltage signal, creating a closed-loop system that maintains voltage accuracy despite the presence of parasitic capacitance
2Ease of operation
If parasitic capacitance is present in the transistor, then the transistor can function, but voltage error induces emission time error of PWM
Solution Approach 1:
The patent replaces the direct voltage control method with a compensation-based control method, where the PWM emission time is adjusted based on measured voltage errors from parasitic capacitance, substituting simple voltage application with a corrected control signal that accounts for timing deviations
Data Source
AI summary
An electronic device is provided. The electronic device includes a semiconductor element and a pixel circuit. The pixel circuit includes a first comparator, a second comparator and a subtraction unit. The first comparator generates a first comparison signal. The second comparator generates a second comparison signal. The subtraction unit is coupled to the semiconductor element and configured to receives the first comparison signal and the second comparison signal and generates a subtraction signal.


