Pixel Circuit Threshold Compensation for Low-Frequency Display Quality
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Solution Overview
Problem
Conventional display devices face challenges in achieving low power consumption, high-resolution, and stereoscopic imaging while maintaining image quality under various frame frequencies, with issues such as flicker, current leakage, and afterimages due to threshold voltage shifts.
Innovation Solution
A pixel design incorporating oxide semiconductor transistors and polysilicon semiconductor transistors, along with a storage capacitor and multiple control transistors, allows for dynamic control of current paths and threshold voltage compensation, enabling operation at various frame frequencies with improved image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the display device operates at low frame frequency to reduce power consumption, then power consumption is reduced, but image quality deteriorates due to flicker and afterimages
Solution Approach 1:
The pixel circuit performs threshold voltage compensation in advance during the non-emission period before the emission period begins. The compensation transistor adjusts the driving transistor's threshold voltage beforehand, ensuring image quality is maintained even when operating at low frame frequencies where time is more constrained.
Solution Approach 2:
The display device dynamically adjusts its operating mode between emission and non-emission periods. During non-emission periods, the circuit reconfigures to perform compensation operations, while during emission periods, it focuses on light output. This dynamic switching allows the system to maintain image quality across varying frame frequencies.
2Manufacturing precision
If the display device operates at high frame frequency to display high-resolution stereoscopic images, then image resolution and stereoscopic effect are improved, but power consumption increases
Solution Approach 1:
The pixel circuit operates in periodic emission and non-emission periods. During non-emission periods, compensation operations are performed without light output, and during emission periods, light is emitted based on the compensated driving current. This periodic operation enables high frame frequency stereoscopic display while managing power consumption through controlled non-emission intervals.
3Ease of manufacture
If the pixel circuit structure is simplified to reduce manufacturing complexity, then manufacturing cost is reduced, but leakage current increases causing image quality degradation
Solution Approach 1:
The compensation transistor serves multiple functions: it compensates for threshold voltage shifts, controls leakage current during non-emission periods, and enables the pixel to operate across different frame frequencies. This multi-functionality allows the circuit to maintain image quality without requiring additional dedicated transistors for each function.
Solution Approach 2:
The circuit changes the operating parameters of existing transistors dynamically. The compensation transistor adjusts the gate-source voltage of the driving transistor to compensate for threshold voltage variations. By changing voltage parameters rather than adding structural elements, the circuit reduces leakage current while maintaining manufacturing simplicity.
Data Source
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AI summary
A display device (1000) includes: a pixel (10, 11, 12, 13, 14), a scan driver (200, 201), an emission driver (300), and a data driver (400). The pixel includes (10, 11, 12, 13, 14): a light emitting element (LD); a first transistor (M1); a second transistor (M2) connected between a data line (Dj) and a first node (N1); a third transistor (M3) connected between a second node (N2) and a third node (N3) connected to a gate electrode of the first transistor (M1); a fourth transistor (M4) connected between the second node (N2) and a third power line (PL3); a fifth transistor (M5) connected between the first node (N1) and a fourth node (N4); a sixth transistor (M6) connected between a first power line (PL1) and the first node (N1) and which is turned off in response to a first emission control signal; a storage capacitor (Cst) connected between the third node (N3) and the fourth node (N4); and a first capacitor (C1) connected between the first power line (PL1) and the fourth node (N4).