Pixel Circuit Transistor Connectivity and Substrate Area Optimization
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Solution Overview
Problem
Existing pixel circuits in display technologies face challenges in optimizing the arrangement and connectivity of transistors and capacitors, leading to inefficiencies in light emission control and increased substrate area usage, which affects display resolution and stability.
Innovation Solution
A pixel circuit design that includes a semiconductor layer forming active layers for transistors, a first metal layer for gate electrodes and a storage capacitor, and a second metal layer for a capacitive electrode coupled to a drive power line, with specific arrangements and overlaps to enhance stability and efficiency, and a third metal layer for signal distribution, optimizing transistor and capacitor connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate electrode metal layers of data write transistor, reset transistor, and light-emitting control transistor are sequentially arranged along a target direction, then the transistor connectivity is established, but the substrate area usage increases
Solution Approach 1:
The patent combines multiple gate electrode metal layers (data write transistor gate, reset transistor gate, and light-emitting control transistor gate) into a shared gate electrode structure. This merging approach allows the transistors to share common conductive paths and electrode structures, thereby establishing necessary connectivity while significantly reducing the overall substrate area required compared to separate arranged structures.
2Reliability
If the pixel circuit uses conventional transistor and capacitor arrangement, then the circuit functionality is achieved, but the display resolution is limited due to increased substrate area
Solution Approach 1:
The patent employs multi-layer metal structures arranged in vertical dimensions rather than only horizontal plane arrangements. By stacking gate electrode metal layers and capacitive electrodes in multiple layers with selective overlaps, the circuit achieves full functionality while compressing the layout into a more compact three-dimensional configuration, thereby improving display resolution without sacrificing circuit reliability.
3Productivity
If the second capacitive electrode is coupled to drive power line and adjacent pixel circuits are connected, then the light emission control efficiency is improved, but the device complexity increases
Solution Approach 1:
The patent designs the second capacitive electrode and connection portions to serve multiple functions simultaneously. The second capacitive electrode acts as both a storage capacitor component and a connection node for adjacent pixel circuits. The connection portions in the second metal layer serve as both inter-pixel circuit connectors and signal distribution paths. This multi-functionality improves light emission control efficiency while avoiding the need for separate dedicated structures, thereby limiting the increase in device complexity.
Data Source
AI summary
Provided is a pixel circuit. The pixel circuit includes a semiconductor layer on a side of a base substrate, wherein the semiconductor layer is configured to form an active layer of each of various transistors in the pixel circuit; a first metal layer on the side of the base substrate, wherein the first metal layer is configured to form a gate electrode of the transistor and a first capacitive electrode of a storage capacitor in the pixel circuit; and a second metal layer on the side of the base substrate, wherein the second metal layer is configured to form a second capacitive electrode of the storage capacitor.