Pixel Circuit Dynamic Voltage Adjustment for Luminance Control
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Solution Overview
Problem
Existing display devices, particularly high-resolution panels used in head-mounted display devices for VR or AR, face challenges in efficiently managing power voltages and signal levels across different operational phases, which affects the luminance and efficiency of light-emitting elements.
Innovation Solution
The proposed pixel structure includes a first transistor, a second transistor, a third transistor, a capacitor, and a light-emitting element, with specific voltage levels and operational states during different phases of a frame period to optimize power management and signal handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the second power voltage is adjusted to have a second voltage level higher than the first voltage level during the data write period, then the luminance control of the light-emitting element is improved, but the device complexity increases due to multiple voltage level management
Solution Approach 1:
The patent dynamically adjusts the second power voltage level based on the operational phase: during the data write period, the second power voltage is set to a second voltage level higher than the first voltage level to enable proper data writing, while during the emission period, it is set to a first voltage level to ensure stable light emission. This dynamic voltage adjustment resolves the contradiction by adapting the voltage levels to the specific operational requirements of each phase.
Solution Approach 2:
The patent changes the voltage level parameter of the second power voltage according to the operational phase. By switching between the first voltage level (during emission period) and the second voltage level (during data write period), the patent optimizes both luminance control and device operation, resolving the contradiction between improved luminance control and increased device complexity.
2Productivity
If multiple transistors and capacitors are used to manage different voltage levels during emission and data write periods, then the power management efficiency is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent segments the power management function into multiple transistors (first, second, and third transistors) and capacitors (first and second capacitors), each responsible for specific voltage level management during different operational phases. This segmentation allows for improved power management efficiency by dedicating specific components to specific tasks, while the modular nature of the segmented design actually simplifies manufacturing compared to a monolithic complex circuit.
Solution Approach 2:
The patent employs multi-functional transistors and capacitors that serve different purposes during different operational phases. For example, the first transistor functions as a switching element during data write period and as a current control element during emission period. This multi-functionality reduces the total number of components needed, thereby reducing manufacturing precision requirements while maintaining high power management efficiency.
3Measurement precision
If the second power voltage is set to a higher voltage level during data write period, then the data signal writing accuracy is improved, but the energy consumption increases
Solution Approach 1:
The patent employs periodic action by switching the second power voltage between two distinct levels based on the operational phase: the second voltage level (higher) is applied during the data write period to ensure accurate data signal writing, while the first voltage level (lower) is applied during the emission period to reduce energy consumption. This periodic switching resolves the contradiction by applying high voltage only when necessary for data accuracy, rather than continuously.
Solution Approach 2:
The patent applies the higher second voltage level in advance during the data write period before the emission period begins. This preliminary action ensures that data signals are accurately written and stored in the capacitor before the lower voltage level is applied during emission, thereby achieving both data writing accuracy and energy efficiency through proper timing of voltage level transitions.
Data Source
AI summary
Provided herein may be a pixel including a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node, a second transistor connected between a data line and the third node, and including a gate electrode electrically connected to a first sub-gate line, a third transistor connected between a first power line, which is configured to supply a first power voltage, and the first node, and including a gate electrode electrically connected to an emission control line, a first capacitor connected between the first node and the third node, and a light-emitting element connected between the second node and a second power line, which is configured to supply a second power voltage.


