Pixel Circuit Threshold Voltage Compensation

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Solution Overview

Problem

Micro-OLED panels suffer from uneven brightness due to mismatched driving transistors and OLEDs, causing the Mura effect, which existing pixel structures have not effectively addressed.

Innovation Solution

A novel pixel circuit design incorporating multiple transistors and capacitors to control and cancel the offset of threshold voltages, ensuring uniform brightness by accurately determining the driving current and gate voltage, thereby minimizing the impact of threshold voltage variations across pixels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional pixel structures are used, then device complexity is low, but brightness uniformity deteriorates due to threshold voltage mismatch

Engineering Contradiction:
Improvebrightness uniformityVSAvoidpixel circuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The pixel circuit is divided into multiple functional modules: a driving transistor module, a threshold voltage compensation module, and a control module. The compensation module includes additional transistors (M2-M5) and capacitors (C1-C3) that operate independently to cancel threshold voltage offsets, allowing precise brightness control without requiring perfect manufacturing uniformity across the entire pixel circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary components including a first capacitor (C1) coupled between the control terminal and reference terminal, and a second capacitor (C2) coupled between the control terminal and data terminal. These capacitors act as intermediaries to store and compensate for threshold voltage variations, mediating between the input signal and the driving transistor to ensure uniform brightness output.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If threshold voltage offset cancellation is implemented, then brightness uniformity is improved, but device complexity increases

Engineering Contradiction:
Improvethreshold voltage matchingVSAvoidtransistor and capacitor count
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into integrated modules: the driving transistor (M1) combines signal amplification and current control functions, while the compensation transistors (M2-M5) and capacitors (C1-C3) work together as a unified threshold voltage cancellation system. This merging reduces the overall complexity compared to separate compensation circuits for each transistor.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The additional transistors and capacitors in the compensation module serve multiple functions: they compensate for threshold voltage offsets, store reference voltages, and control signal timing. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity while achieving improved threshold voltage matching.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240304143A1Pixel circuit of display panel
Publication Date: 2024.09.12 NOVATEK MICROELECTRONICS CORP
  • US20240304143A1 patent drawing
  • US20240304143A1 patent drawing
  • US20240304143A1 patent drawing

AI summary

A pixel circuit of a display panel includes a light emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first capacitor. The first transistor includes a drain terminal, a source terminal and a gate terminal. The second transistor is coupled to a data input terminal of the pixel circuit. The third transistor is coupled to the second transistor. The fourth transistor is coupled between the second transistor and the light emitting device. The fifth transistor is coupled between the drain terminal of the first transistor and the gate terminal of the first transistor. The sixth transistor is coupled between the second transistor and the drain terminal of the first transistor. The first capacitor is coupled between the third transistor and the gate terminal of the first transistor.