Pixel Circuit Wiring Layout for High-Density Electro-Optical Displays
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Solution Overview
Problem
Existing electro-optical devices face challenges in achieving higher definition and smaller display sizes due to the need for narrower pitch control lines, which are restricted by space when not overlapping with the gate of the drive transistor.
Innovation Solution
The scanning and control lines are wired to overlap with the gate of the drive transistor, allowing for narrower pitch and higher density wiring, and the use of storage capacities and switching transistors to manage potential fluctuations, ensuring defined brightness and uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If control lines are wired without overlapping the gate of the drive transistor, then the wiring layout is simpler and easier to manufacture, but the pitch between control lines must be larger, limiting display density and definition
Solution Approach 1:
The patent transitions from a two-dimensional planar wiring layout to a three-dimensional stacked layout by routing control lines through different layers. Specifically, the scanning line is positioned in a first wiring layer while the gate of the drive transistor is in a second wiring layer above it, allowing vertical stacking that reduces horizontal pitch requirements and increases display density without complicating the manufacturing process
2Area of moving object
If control lines are wired to overlap the gate of the drive transistor in different layers, then the pitch between control lines can be narrower and display density can be higher, but potential fluctuations may occur that affect display uniformity
Solution Approach 1:
The patent introduces a capacitance element as an intermediary component between the control lines and the gate of the drive transistor. This capacitance element couples the scanning line to the gate, allowing the control signal to be transmitted while isolating the gate from direct potential fluctuations on the scanning line, thereby maintaining display uniformity despite the overlapping three-dimensional wiring configuration
3Length of moving object
If the pitch between control lines is reduced to achieve smaller display size, then the display can be made more compact and high-definition, but the space for wiring becomes more constrained
Solution Approach 1:
The patent resolves the space constraint by moving the wiring arrangement into the third dimension. Control lines are routed in different vertical layers rather than being confined to a single planar layer, which allows narrower horizontal pitch between lines while providing sufficient vertical space for proper wiring separation and connection, enabling compact high-definition displays
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables higher definition displays with smaller sizes by allowing for narrower pitch control lines without deteriorating display integrity, maintaining defined brightness, and preventing fluctuations that cause display unevenness.
Implementation Method 1
a light-emitting element that emits light at a brightness that depends on the size of a current that is supplied through the drive transistor
Implementation Method 2
the scanning line and the gate of the drive transistor overlap when viewed from a direction that is perpendicular to a surface of a substrate on which the pixel circuit is formed
Data Source
AI summary
An electro-optical device includes one or more control lines that include a scanning line, a data line and a pixel circuit. The pixel circuit has a drive transistor, a write-in transistor with a gate which is electrically connected to the scanning line, a light-emitting element that emits light at a brightness that depends on the size of a current that is supplied through the drive transistor, and a control line which overlaps the gate of the drive transistor when viewed from a direction that is perpendicular to a surface of a substrate on which the pixel circuit is formed is included in the one or more control lines.