Pixel Circuit Wiring Simplification for Display Panels
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Solution Overview
Problem
The existing pixel circuit and display panel designs with MIP-SPI technology have a complex structure due to multiple signal lines, leading to increased power consumption, especially with the 60 Hz square wave signals for FRP and XFRP, which complicates the circuit and raises energy usage.
Innovation Solution
A pixel circuit comprising a switch sub-circuit, storage sub-circuit, and drive sub-circuit that multiplexes high and low voltage terminals to function as FRP and XFRP, reducing the number of signal lines by integrating these functions into the drive sub-circuit, and employing DC and AC voltages for black and white image display respectively to manage liquid crystal polarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate FRP and XFRP signal lines are provided in each pixel circuit, then the display panel can generate forward and reverse reference potentials, but the wiring becomes complex and power consumption increases
Solution Approach 1:
The patent merges the FRP and XFRP signal lines into a single data line that carries multiplexed signals. The switch sub-circuit selectively connects this shared data line to either the forward reference potential or reverse reference potential based on control signals, eliminating the need for separate dedicated signal lines while maintaining the required functionality.
Solution Approach 2:
The data line is designed to serve multiple functions: it can transmit image data during normal operation and alternatively transmit either forward or reverse reference potentials when needed. This multi-functional design reduces the total number of signal lines required in the pixel circuit.
2Reliability
If separate FRP and XFRP signal lines are provided in each pixel circuit, then the display panel can generate forward and reverse reference potentials, but power consumption increases due to 60 Hz square wave signals
Solution Approach 1:
The patent implements periodic switching of the reference potential polarity through the switch sub-circuit. By alternately connecting the data line to forward or reverse reference potentials at controlled intervals, the system achieves the required AC coupling effect for liquid crystal compensation while reducing overall power consumption compared to continuous 60 Hz square wave signaling.
3Adaptability or versatility
If multiple signal lines are provided in pixel circuit, then the display panel can implement MIP-SPI technology, but the pixel space is reduced
Solution Approach 1:
The patent combines multiple signal transmission functions into a single data line, reducing the number of wiring lines that need to be routed through each pixel. This frees up valuable pixel real estate while maintaining the MIP-SPI technology's ability to integrate display drivers directly into the panel structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This simplifies the display panel wiring, increases pixel space, and significantly reduces power consumption by eliminating the need for separate FRP and XFRP signal lines and optimizing voltage usage.
Implementation Method 1
a difference between the voltage of the common electrode and a voltage of the first voltage terminal is alternating H and −H when a white image is displayed
Implementation Method 2
when a black image is displayed, supplying a DC voltage to a common electrode... when a white image is displayed, supplying an AC voltage is to the common electrode
Data Source
AI summary
There is provided a pixel circuit, a display panel, a drive method. The pixel circuit comprises a switch sub-circuit, a storage sub-circuit, a drive sub-circuit. The switch sub-circuit is connected to a gate line, a data line, the storage sub-circuit, and configured to transmit a signal on the data line to the storage sub-circuit under control of a signal on the gate line. The storage sub-circuit is connected to a first voltage terminal, a second voltage terminal, and the drive sub-circuit, and configured to transmit a signal of the first voltage terminal or the second voltage terminal to the drive sub-circuit under control of the switch sub-circuit. The drive sub-circuit is connected to the first voltage terminal, the second voltage terminal, a pixel electrode, and configured to transmit the signal of the first voltage terminal or the second voltage terminal to the pixel electrode under control of the storage sub-circuit.