Pixel Circuitry Time-Division Multiplexing for High Resolution Displays
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Solution Overview
Problem
The increasing screen resolution of display devices leads to a situation where the number of signal lines exceeds the number of channels in a single integrated circuit (IC), resulting in an insufficient number of channels for data signal supply, which hampers the development of high-resolution display devices, especially for virtual and augmented reality applications.
Innovation Solution
A pixel circuitry design where sub-pixels in odd-numbered and even-numbered rows are electrically coupled to different signal lines, and these signal lines are connected to data lines in a time-sharing manner using switch circuits, allowing each data line to charge two columns of sub-pixels, thereby alleviating the channel insufficiency issue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of signal lines is increased to meet higher screen resolution requirements, then the screen resolution is improved, but the number of channels in a single integrated circuit becomes insufficient
Solution Approach 1:
The pixel circuitry is divided into multiple banks, with each bank containing a subset of sub-pixels. Each bank has its own dedicated data lines, allowing the system to manage a large total number of sub-pixels (e.g., 3840 columns) by organizing them into smaller manageable groups (e.g., 6 banks with 640 columns each). This segmentation enables the use of fewer data lines per bank while achieving high overall resolution.
Solution Approach 2:
The patent implements dynamic control of signal line connections through multiple gate lines (first gate lines and second gate lines) that can selectively activate different banks of sub-pixels. The gate lines enable time-division multiplexing where different sets of data lines serve different banks at different times, allowing the same physical data lines to be reused across multiple banks sequentially.
2Productivity
If more data lines are provided to serve more sub-pixels, then the data signal supply capability is improved, but the channel capacity of the integrated circuit is exceeded
Solution Approach 1:
Each data line is designed to serve multiple banks of sub-pixels sequentially through time-division multiplexing. The same data lines that serve the first bank can later serve the second bank, third bank, etc., by being reconfigured through the gate line control system. This multi-functionality allows a limited number of data lines (e.g., 8 data lines per bank) to effectively serve a much larger total number of sub-pixels across all banks.
Solution Approach 2:
The system employs periodic activation of different banks through alternating gate line signals. First gate lines activate odd-numbered banks while second gate lines activate even-numbered banks in alternating time periods. This periodic action allows data lines to be reused in a cyclic manner across different banks, maximizing the utilization of available data line channels while maintaining continuous operation across all sub-pixels.
Data Source
AI summary
Provided are a pixel circuitry, a control method thereof and a display device. The pixel circuitry includes: a plurality of sub-pixels arranged in an array; a plurality of gate lines extending in a first direction, where all sub-pixels located in one row are electrically coupled to one gate line; a plurality of first signal lines and a plurality of second signal lines extending in a second direction, where all sub-pixels located in odd-numbered rows and one column are electrically coupled to one first signal line, and all sub-pixels located in even-numbered rows and one column are electrically coupled to one second signal line, the second direction being perpendicular to the first direction; and a plurality of data lines extending in the second direction, where two first signal lines and two second signal lines coupled to two adjacent columns of sub-pixels are electrically coupled to one data line.