Pixel Clock Generation Circuit for DisplayPort 1.2
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Solution Overview
Problem
Existing pixel clock generation circuits for miniaturized electronic devices are hindered by the large size and cost of reference clock generators, such as crystal oscillators, which also cause electromagnetic interference and are not compatible with the latest DisplayPort 1.2 specifications that render traditional frequency calculation methods obsolete.
Innovation Solution
A pixel clock generation circuit comprising a reference clock generation circuit, an image processing circuit, and a clock adjustment circuit that generates a pixel clock without an additional reference clock generator on the circuit board, using an active clock generation method like an LC tank and fractional-N synthesizer to produce an accurate pixel clock, reducing board area and electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference clock generator (crystal oscillator) is mounted on the circuit board to generate a stable reference clock, then the frequency accuracy of the pixel clock is improved, but the device size increases and electromagnetic interference occurs
Solution Approach 1:
The patent merges the reference clock generation function into the video format transformation chip by integrating a clock generation circuit that includes a reference clock generator, fractional-N synthesizer, and frequency setting circuit. This eliminates the need for a separate crystal oscillator on the circuit board, reducing board area while maintaining frequency accuracy through integrated design
Solution Approach 2:
The patent extracts the reference clock generation function from the traditional external crystal oscillator and relocates it into the video format transformation chip. This extraction allows the system to use an on-chip reference clock source instead of an external component, reducing electromagnetic interference and board space requirements
2Measurement precision
If a reference clock generator (crystal oscillator) is mounted on the circuit board to generate a stable reference clock, then the frequency accuracy of the pixel clock is improved, but electromagnetic interference increases
Solution Approach 1:
The patent merges the reference clock generation function into the video format transformation chip, eliminating the need for external wiring and separate crystal oscillator components. This integration reduces electromagnetic interference by confining the clock signal generation within the chip boundaries, while maintaining frequency accuracy through the integrated reference clock generator and synthesizer circuitry
3Measurement precision
If a reference clock generator is mounted on the circuit board to generate a stable reference clock, then the pixel clock can be generated accurately, but the device complexity increases
Solution Approach 1:
The patent merges multiple functions including reference clock generation, fractional-N synthesis, and frequency setting into a single integrated clock generation circuit within the video format transformation chip. This integration simplifies the overall device architecture by eliminating separate external components and reducing the number of interconnections, while maintaining pixel clock accuracy through the coordinated operation of integrated circuit blocks
4Measurement precision
If the characteristic signals Mvid and Nvid are used to calculate pixel clock frequency according to DisplayPort 1.2a specification, then the pixel clock frequency can be determined, but the solution becomes incompatible with DisplayPort 1.2 multi-stream transport technology
Solution Approach 1:
The patent implements a dynamic pixel clock generation system where the frequency is adjusted in real-time based on synchronization signals from the image processing circuit. Instead of relying on fixed Mvid and Nvid parameters that are incompatible with multi-stream transport, the system dynamically determines the required pixel clock frequency from the actual synchronization signal characteristics, enabling compatibility with DisplayPort 1.2 and later specifications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate pixel clock generation without additional board space or interference, supporting miniaturized devices and adhering to new DisplayPort specifications by integrating clock generation within the video format transformation chip.
Implementation Method 1
using an active clock generation method like an LC tank
Implementation Method 2
fractional-N synthesizer to produce an accurate pixel clock
Data Source
AI summary
This invention discloses circuits and methods for generating a pixel clock. The circuits utilize an image signal of a first format to generate a pixel clock, which can be utilized to generate an image signal of a second format. The circuits include a reference clock generation circuit, an image processing circuit, and a clock adjustment circuit. The reference clock generation circuit generates a reference clock. The image processing circuit processes the image signal of the first format to generate a control signal. The clock adjustment circuit, which is coupled to the reference clock generation circuit and the image signal processing circuit, generates the pixel clock according to the reference clock and the control signal. The control signal is substantially a periodic signal, whose frequency is proportional to the frequency of a synchronization signal of the image signal of the second format.