Pixel Clock Generating Device for Scanning Speed Correction
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Solution Overview
Problem
Existing image forming apparatuses face challenges in maintaining consistent scanning speed, leading to irregularities in image formation, particularly when forming color images, due to variations in scanning speed caused by factors like polygon mirror precision, environmental changes, and chromatic aberration, resulting in reduced image quality and color reproducibility.
Innovation Solution
A pixel clock generating device that calculates and adjusts the frequency of the pixel clock signal based on synchronization signals from photodetectors, using a high-frequency clock signal and frequency divider to ensure accurate scanning speed correction, and incorporates a frequency calculation unit to smooth errors and adjust the pixel clock frequency accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional pixel clock generation method is used, then the device complexity is low, but scanning speed variation occurs leading to image quality degradation
Solution Approach 1:
The patent implements a feedback mechanism where the actual scanning speed is measured and used to adjust the pixel clock frequency. The pixel clock frequency adjustment unit receives information about scanning speed variation and dynamically adjusts the pixel clock frequency to compensate for the variation, ensuring consistent image quality despite changes in scanning conditions.
Solution Approach 2:
The patent changes the parameter of pixel clock frequency dynamically based on scanning speed conditions. The pixel clock frequency adjustment unit modifies the frequency parameter in real-time according to the measured scanning speed, allowing the system to adapt to varying scanning conditions and maintain image quality without requiring a completely complex redesign of the entire system.
2Manufacturing precision
If scanning speed is not corrected, then the device complexity is low, but positional errors occur reducing color reproducibility
Solution Approach 1:
The system uses feedback from scanning speed measurements to adjust the pixel clock frequency. The pixel clock frequency adjustment unit receives scanning speed information and modifies the clock frequency accordingly, creating a closed-loop control system that corrects positional errors and maintains color reproducibility through continuous adaptation.
Solution Approach 2:
The patent introduces dynamic adjustment of the pixel clock frequency based on real-time scanning speed conditions. Instead of using a fixed frequency, the system dynamically adapts the clock frequency to match varying scanning speeds, enabling the system to maintain precision under changing operational conditions without requiring multiple fixed-frequency systems.
3Reliability
If pixel clock frequency is adjusted based on scanning speed, then scanning speed errors are corrected, but the device complexity increases
Solution Approach 1:
The patent adjusts the pixel clock frequency parameter dynamically based on scanning speed measurements. The pixel clock frequency adjustment unit modifies this single critical parameter in response to scanning conditions, providing a relatively simple approach to improving reliability compared to redesigning the entire scanning system.
Solution Approach 2:
The system applies local quality adjustment by modifying only the pixel clock frequency parameter where needed, rather than changing the entire scanning system. The pixel clock frequency adjustment unit focuses its correction action on this specific parameter, allowing reliable scanning speed correction with minimal added complexity to the overall system architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively corrects scanning speed errors and nonlinear errors, improving image quality by maintaining consistent scanning speed and reducing positional errors, thereby enhancing color reproducibility and resolution in multicolor image formation.
Implementation Method 1
a photodetector 1004 detects the scanning beam for each line
Implementation Method 2
A phase-locked loop 1006 receives a clock signal from a clock generating circuit 1005, generates a phase-locked (or phase-synchronized) image clock signal (pixel clock signal) for each line based on an output signal from the photodetector 1004
Implementation Method 3
a laser beam (scanning beam) emitted from a semiconductor laser unit 1009 is deflected by a rotating polygon mirror 1003
Implementation Method 4
passes through a scanning lens 1002, and forms a beam spot on a photoconductor 1001
Implementation Method 5
The photoconductor 1001 is scanned and exposed by the beam spot and as a result, an electrostatic latent image is formed
Data Source
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AI summary
A pixel clock generating device includes a time interval detection unit detecting a time interval between a first signal and a second signal in each of cyclically repeating N (≧ 2) time periods; a comparing unit cyclically selecting a target value from N target values corresponding to the N time periods and outputting an error indicating a difference between the detected time interval and the selected target value for each of the N time periods; a frequency calculation unit correcting a frequency of the pixel clock signal based on the error and cyclically generating a frequency specification signal indicating the corrected frequency for each of the N time periods; a high-frequency clock generating unit generating a high-frequency clock signal; and a pixel clock generating unit generating a pixel clock signal based on the frequency specification signal and the high-frequency clock signal.