Pixel Structure Common Electrode Shielding Parasitic Capacitance

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Solution Overview

Problem

The proximity of the pixel electrode to the data line in liquid crystal displays increases parasitic capacitance, leading to charge interference and cross-talk effects, which complicates the fabrication process and increases costs due to the need for additional insulating layers and metal layers for shielding.

Innovation Solution

A method is developed to fabricate a pixel structure by forming a first patterned metal layer with a gate electrode, data lines, and a common electrode, followed by a semiconductor channel layer, passivation layer, and a conducting layer, where the common electrode is positioned above the data line segment, reducing parasitic capacitance without the need for additional metal layers or complex fabrication steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the pixel electrode is positioned close to the data line, then the aperture ratio is improved, but parasitic capacitance increases causing charge interference and cross-talk effects

Engineering Contradiction:
Improveaperture ratioVSAvoidparasitic capacitance
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A common electrode layer is introduced as an intermediary between the pixel electrode and the data line. This intermediate layer acts as a shield that reduces the parasitic capacitance coupling between the pixel electrode and data line, allowing the pixel electrode to be positioned closer to the data line without suffering from charge interference and cross-talk effects, thereby improving aperture ratio while controlling parasitic capacitance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution transitions from a two-dimensional planar arrangement to a three-dimensional layered structure by adding the common electrode layer in the vertical dimension. This dimensional change allows the pixel electrode and data line to be positioned closer in the planar view (improving aperture ratio) while the common electrode layer provides shielding in the vertical dimension (reducing parasitic capacitance)

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-affected harmful factors

If a common electrode layer is added to shield parasitic capacitance, then charge interference is reduced, but fabrication complexity and costs increase due to additional layers and steps

Engineering Contradiction:
Improvecharge interferenceVSAvoidfabrication process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The common electrode layer is merged with the existing data line structure in the fabrication process. By forming the common electrode layer as part of the metal layer that also creates the data line, the patent reduces fabrication complexity and costs while still achieving the shielding effect against parasitic capacitance and charge interference

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If a common electrode layer is added to shield parasitic capacitance, then cross-talk effects are reduced, but fabrication time and costs increase

Engineering Contradiction:
Improvecross-talk effectsVSAvoidfabrication time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The common electrode layer is formed preliminarily during the metal layer fabrication process, before subsequent patterning and electrode formation steps. This preliminary action integrates the shielding function into the existing fabrication sequence, reducing additional fabrication time and costs while effectively reducing cross-talk effects between pixel electrodes and data lines

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8497948B2Pixel structure and method for fabricating the same
Publication Date: 2013.07.30 AU OPTRONICS CORP
  • US8497948B2 patent drawing
  • US8497948B2 patent drawing
  • US8497948B2 patent drawing

AI summary

A pixel structure includes a first patterned metal layer, a gate insulating layer, a semiconductor channel layer, a second patterned metal layer, a passivation layer, and a conducting layer. A gate line of the second patterned metal layer is electrically connected by the conducting layer to a gate extension electrode of the first patterned metal layer. A source electrode of the second patterned metal layer is electrically connected by the conducting layer to a second data line segment of the first patterned metal layer. A method for fabricating a pixel structure is also disclosed herein.