Charge-Transfer Pixel DAC for Low-Noise Image Sensor Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing digital to analog converters (DACs) in image sensors suffer from high noise due to inner resistivity and capacitance, leading to increased current consumption and significant chip area occupation.
Innovation Solution
Implementing DACs using imaging pixels within the pixel array, where each pixel includes a transfer gate coupling a memory node and a capacitive sensing node, with a control circuit to store and transfer electrical charge to generate an output voltage, reducing noise and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DAC architectures are used, then conversion function is achieved, but noise increases due to inner resistivity and capacitance
Solution Approach 1:
The patent replaces conventional voltage-based DAC operation with a charge-based operation system. Memory nodes store electrical charge instead of voltage, and transfer gates move charge packets to the sensing node. This charge-domain operation eliminates the noise generated by inner resistivity and capacitance inherent in voltage-based DACs, achieving superior noise performance while maintaining the DAC conversion function.
2Reliability
If noise reduction measures are implemented in known DAC architectures, then noise decreases, but current consumption increases
Solution Approach 1:
The patent employs charge-based operation where memory nodes store and transfer discrete charge packets through transfer gates controlled by digital input signals. This approach achieves noise reduction without requiring additional current-consuming noise filtering circuits or low-noise amplifiers, thereby maintaining low current consumption while improving noise performance.
3Productivity
If conventional DAC solutions are implemented, then conversion function is provided, but chip area occupation increases significantly
Solution Approach 1:
The patent implements a multi-functional pixel structure that serves both as an imaging pixel and as a DAC unit. The same pixel components (memory node, transfer gate, sensing node) are used for both photodetection and digital-to-analog conversion functions. This eliminates the need for separate dedicated DAC circuitry, significantly reducing chip area occupation while maintaining full DAC conversion capability.
4Measurement precision
If charge transfer is controlled by transfer gates, then precise voltage generation is achieved, but device complexity increases
Solution Approach 1:
The patent uses identical pixel structures and transfer gate mechanisms for both imaging and DAC functions. The transfer gates are controlled by digital input signals that directly modulate the charge transfer, leveraging the inherent precision of the pixel's charge-to-voltage conversion. This homogeneous design achieves precise output voltage generation without requiring complex dedicated control circuitry, as the pixel itself provides the precision mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed DAC design achieves low noise and current consumption while maintaining a compact chip area, improving differential linearity and power supply rejection ratio, and allowing for efficient voltage ramp generation.
Implementation Method 1
controlling, based on a digital input signal, the first transfer gates of the first and second pixels to transfer the charge stored at the memory nodes to the sensing node
Implementation Method 2
storing electrical charge at each of the memory nodes by activating the reset transistor to apply a reference voltage to the memory node of each of the first and second pixels
Data Source
AI summary
The present disclosure relates to a DAC that includes: a first pixel including a first transfer gate coupling a memory node of the first pixel and a capacitive sensing node (SN); a second pixel comprising a first transfer gate coupling a memory node of the second pixel and the capacitive SN; a reset transistor coupling the sensing node to a first voltage supply rail; and a control circuit configured to store electrical charge by activating the reset transistor to apply a reference voltage to the memory node of each of the first and second pixels; and generate a voltage of the DAC at the sensing node by deactivating the reset transistor and controlling the first transfer gates of the first and second pixels to transfer the charge stored.


