Pixel Data Bus Gating for Lower-Power Display Loading
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Solution Overview
Problem
Foveated displays face significant power consumption issues due to the use of multiplexers and energy consumption across pixel data buses, which also reduce the field of view (FOV) in electronic devices.
Innovation Solution
Implementing a multiplexer-free architecture by hardwiring groups of source latches to pixel data bus wires and gating slices of the bus to correspond with active latches, reducing energy consumption and maintaining stable FOV.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiplexers are used to route image data to source latches, then data routing flexibility is improved, but power consumption increases and die area increases
Solution Approach 1:
The patent removes multiplexers from the data path entirely, extracting the routing function from active components to passive hardwired connections. This eliminates the power consumption and area overhead of multiplexer circuits while maintaining data routing capability through dedicated physical connections between data bus wires and source latch groups.
Solution Approach 2:
The patent segments the display into multiple slices, with each slice having dedicated source latches hardwired to specific data bus wires. This segmentation allows independent control of different display regions and enables selective activation of slices to reduce power consumption when not all regions are actively displayed.
2Adaptability or versatility
If multiplexers are used to route image data to source latches, then data routing flexibility is improved, but die area increases
Solution Approach 1:
The patent removes multiplexers from the data path entirely, extracting the routing function from active components to passive hardwired connections. This eliminates the power consumption and area overhead of multiplexer circuits while maintaining data routing capability through dedicated physical connections between data bus wires and source latch groups.
3Measurement precision
If full resolution image data is sent across the pixel data bus to all source latches, then display quality is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by allowing different slices of the display to operate at different resolutions simultaneously. The foveated region maintains full resolution while peripheral regions use lower resolution, with each slice's source latches receiving appropriately scaled image data through hardwired connections, reducing overall power consumption while maintaining perceived display quality.
Solution Approach 2:
The patent uses partial action by activating only the necessary portions of the data bus and source latches for currently displayed slices. When certain display regions are not active, their corresponding source latches remain inactive, reducing power consumption without affecting the quality of actively displayed regions.
4Measurement precision
If the number of pixel columns is increased, then display resolution is improved, but power consumption increases
Solution Approach 1:
The patent segments the display into multiple independent slices along the horizontal direction, with each slice having its own set of source latches and hardwired data bus connections. This segmentation allows the display to activate only the necessary number of slices based on current content requirements, reducing power consumption while maintaining the capability for high resolution when needed.
Data Source
AI summary
In electronic displays, sending image data across a pixel data bus to the source latches consumes energy, particularly as the number of columns of pixels of the electronic display increases. To reduce the amount of energy consumed by the pixel data bus, slices of the pixel data bus may be gated to correspond to which source latches are being loaded. For instance, a first set of source latches corresponding to a first slice of the pixel data bus may be loaded with data while downstream slices of the pixel data bus may be gated to save energy. To reduce the peak energy consumed by the pixel data bus, the pixel data bus may be divided into two parts that are loaded from opposite sides. Thus, the total number of gated slices may remain stable throughout the loading process.


