Pixel Data Rearrangement Circuit for Power Consumption Reduction
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Solution Overview
Problem
Image processing devices experience high power consumption and heat generation due to processing pixel arrays with specific patterns, leading to increased costs and reduced device lifespan, particularly when multiple processing systems are involved.
Innovation Solution
An image processing device with a conversion circuit that rearranges pixel data arrays to reduce simultaneous power consumption in processing systems, including the use of first and second conversion circuits to convert and reconvert pixel data arrays, thereby minimizing the probability of maximum power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If pixel data array is processed pixel by pixel in multiple processing systems, then image processing function is achieved, but power consumption increases and heat generation occurs
Solution Approach 1:
The conversion circuit performs preliminary rearrangement of pixel data before it enters the processing systems. By reordering the pixel data in advance (converting from first pixel data array to second pixel data array), the system prevents the condition where multiple processing systems simultaneously consume maximum power, thereby reducing overall power consumption and heat generation while maintaining processing functionality.
2Use of energy by stationary object
If conversion circuit rearranges pixel data array, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The conversion circuit acts as an intermediary component between the image processing circuit and the processing units. This mediator rearranges the pixel data in a relatively simple manner (converting between first and second pixel data arrays) to achieve power consumption reduction without requiring complex modifications to the main processing systems.
Data Source
AI summary
An image processing device and image processing method that reduce the probability that the power consumption of two processing systems will be maximized simultaneously. Such image processing device includes an image processing circuit, a conversion circuit receiving a first pixel data array outputted from the image processing circuit and converting the first pixel data array into a second pixel data array by converting an arrangement of pieces of pixel data included in the first pixel data array pixel by pixel, the first pixel data array being an aggregate of a plurality of pieces of pixel data, the pieces of pixel data being pieces of data corresponding to a plurality of pixels, each of the pieces of pixel data having a plurality of bits, an aggregate of the pixels forming a pixel array, and a processing unit processing the second pixel data array outputted from the conversion circuit.