Pixel-Based DRC Using Neural Networks for Curvilinear Layouts
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Solution Overview
Problem
Traditional design rule checking (DRC) methods struggle with curvilinear designs, leading to false positives and performance issues due to reliance on one-dimensional measurements and integer-based data formats, which are inadequate for complex nano-scale geometries and manufacturing variations.
Innovation Solution
A pixel-based DRC method using a machine-trained neural network, such as a convolutional neural network, is employed to perform design rule checks for both rectilinear and curvilinear designs, trained through deep learning with data from traditional geometric, equation-based, or circle-tracing methods, and capable of inferring DRC errors in rasterized images, which are then converted back to the geometry domain for display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional one-dimensional measurement methods are used for DRC, then the checking process is simple and fast, but the measurement precision is insufficient for curvilinear designs and nano-scale geometries
Solution Approach 1:
The patent transitions from traditional one-dimensional measurement approaches to two-dimensional pixel-based analysis. By representing design geometries as pixel arrays and applying convolutional operations across the pixel space, the system achieves superior measurement precision for curvilinear shapes and nano-scale features while maintaining computational efficiency through parallel processing architectures.
2Reliability
If curvilinear designs are fragmented into polygons for traditional DRC, then the design can be processed, but false positives increase and debugging becomes difficult
Solution Approach 1:
The patent replaces the mechanical polygon fragmentation approach with a pixel-based representation system. Instead of converting curvilinear shapes into discrete polygons that introduce discretization errors, the system directly processes curvilinear geometries as continuous pixel arrays, eliminating false positives caused by polygon approximation while maintaining robust error detection capability.
3Manufacturing precision
If the number of design rules increases to accommodate nano-scale processes, then manufacturing precision improves, but the device complexity and difficulty of detecting and measuring increases
Solution Approach 1:
The patent creates a universal pixel-based DRC framework that can handle multiple design rules, curvilinear geometries, and nano-scale measurements through a single unified approach. The convolutional neural network architecture processes various rule types (spacing, enclosure, width) and geometric representations (curvilinear, rectilinear, photonic) using the same pixel-space operations, eliminating the need for separate checking mechanisms for each rule type.
4Adaptability or versatility
If traditional edge processing techniques are used, then the DRC process is efficient for simple geometries, but it cannot handle curvilinear designs and photonic ICs effectively
Solution Approach 1:
The patent fundamentally changes the parameter space from continuous geometric coordinates to discrete pixel intensity values. This parameter transformation enables the use of convolutional neural networks that operate on pixel arrays, providing universal handling capability for curvilinear designs, photonic ICs, and traditional rectilinear geometries simultaneously without requiring geometry-specific processing paths.
Data Source
AI summary
A method for performing pixel-based design rule checking (DRC) is described. This method is used to perform design rule checks for rectilinear and curvilinear designs. In some embodiments, the pixel-based approach is based on computational deep-learning. The pixel-based DRC method of some embodiments is more resilient to false positives than traditional geometric approaches, particularly for designs with curvilinear content, and the inference time remains constant, regardless of how many shapes exist in the design being checked, or how many polygon edges are needed to represent its curvature. The DRC method of some embodiments is implemented by highly parallel architectures (such as Graphics Processing Units (GPU) and Tensor Processing Units (TPU)) to improve processing throughput compared to traditional means.


