Pixel Driver Circuit Layout Using Overlapping Connection Holes
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Solution Overview
Problem
The width of light emitting pixel drivers in display devices limits high resolution due to the presence of multiple transistors, making it difficult to reduce their size.
Innovation Solution
A display device design with a circuit layer comprising specific semiconductor and gate insulating layers, including connection holes that overlap and extend through semiconductor layers, allowing for reduced separation distance between connection electrodes, thereby minimizing the width of pixel drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple transistors are included in light emitting pixel drivers to maintain necessary functions, then device functionality is improved, but pixel driver width increases limiting high resolution
Solution Approach 1:
The patent applies dimensionality change by transitioning from a planar layout to a three-dimensional stacked architecture. Connection holes are formed to extend through multiple layers (first interlayer insulating layer, second interlayer insulating layer, third interlayer insulating layer) in the vertical direction, allowing electrical connections to be established between transistors occupying different vertical levels rather than requiring lateral spacing. This enables multiple transistors to be vertically stacked above each other, significantly reducing the horizontal width of pixel drivers while maintaining all necessary transistor functions for device operation.
2Reliability
If connection holes are spaced apart to ensure proper electrical connection, then connection reliability is improved, but separation distance increases widening pixel drivers
Solution Approach 1:
The patent implements nesting by placing connection holes within overlapping vertical projections of adjacent pixel drivers. Specifically, connection holes of first pixel drivers are positioned within the vertical projection range of second pixel drivers, and vice versa. This nested arrangement allows connection holes to be closely spaced horizontally while maintaining proper electrical connections through the stacked layers, reducing the separation distance between connection holes and thereby minimizing pixel driver width without compromising connection reliability.
Data Source
AI summary
A display device comprises a substrate and a circuit layer. The circuit layer comprises a first semiconductor layer; a first gate insulating layer; a first gate conductive layer; a second gate insulating layer; a second gate conductive layer; a first interlayer insulating layer; a second semiconductor layer; a third gate insulating layer; a third gate conductive layer; a second interlayer insulating layer; and a first source-drain conductive layer. The first source-drain conductive layer comprises at least one connection electrode. Each of the at least one connection electrode is electrically connected to the second semiconductor layer through a first connection hole, and is electrically connected to one of the first semiconductor layer, the first gate conductive layer, and the second gate conductive layer through a second connection hole. The second connection hole overlaps at least a part of the second semiconductor layer and extends through the second semiconductor layer.