CMOS Pixel Floating Diffusion Capacitance Control

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Solution Overview

Problem

Existing image sensors face challenges in achieving optimal floating diffusion capacitance for variable gain control, as prior solutions require additional transistors or signal lines, which are not efficient for both low and high light conditions.

Innovation Solution

A CMOS active pixel sensor design that changes the floating diffusion capacitance using only three transistor gates adjacent to the floating diffusion node, without requiring additional signal lines, allowing for variable gain control by adjusting capacitance based on illumination levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the floating diffusion capacitance is increased to ensure maximum output voltage is within power supply limit at maximum photodiode charge capacity, then the voltage output is reduced making it suitable for high light levels, but the voltage output becomes too low for measuring small signals in low light conditions

Engineering Contradiction:
Improveoutput voltage within power supply limitVSAvoidsmall signal measurement capability
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent applies dynamics by making the floating diffusion capacitance variable rather than fixed. A control transistor (第五晶体管) is introduced to dynamically adjust the capacitance of the floating diffusion node based on illumination conditions. When illumination is strong, the transistor activates to increase capacitance, reducing voltage output to stay within power supply limits. When illumination is weak, the transistor remains off to maintain low capacitance, preserving high voltage output for accurate small signal measurement. This dynamic adjustment resolves the contradiction between handling high and low light conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the capacitance parameter of the floating diffusion node based on operating conditions. By controlling the fifth transistor's on/off state, the capacitance value switches between two states: a larger capacitance for high light levels and a smaller capacitance for low light levels. This parameter change allows the system to adapt to different illumination conditions, ensuring optimal voltage output range for both high and low signal scenarios.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If four transistor gates are added to surround and directly connect to the floating diffusion node to increase capacitance, then the capacitance control is achieved, but the device complexity increases and the smallest possible floating diffusion node capacitance cannot be achieved

Engineering Contradiction:
Improvefloating diffusion capacitance controlVSAvoidnumber of transistor gates
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential transistor gate needed for capacitance control, removing unnecessary gates. Instead of surrounding the floating diffusion node with four transistor gates as in prior art, the invention uses a single control transistor (第五晶体管) whose gate is strategically positioned to control the capacitance. This extraction approach reduces device complexity while maintaining the core functionality of variable capacitance control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The fifth transistor serves multiple functions: it controls the floating diffusion capacitance, enables variable gain operation, and does so without requiring additional signal lines. This multi-functional design achieves capacitance control with minimal added complexity, as the single transistor integrates several control functions that would otherwise require separate components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If additional capacitors are connected between the floating diffusion node and GND or VDD to increase capacitance, then the maximum output voltage is reduced to within power supply range, but additional components and signal lines are required

Engineering Contradiction:
Improveoutput voltage range controlVSAvoidnumber of capacitors and signal lines
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the capacitance control function with the existing transistor structure rather than adding separate capacitors. The fifth transistor's capacitance is integrated directly into the floating diffusion node, combining the control element and capacitance element into a single unified structure. This merging eliminates the need for additional discrete capacitors and their associated signal lines, reducing device complexity while achieving voltage range control.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient variable gain control with high sensitivity in low light conditions and high dynamic range in high light conditions, while minimizing the number of transistors and signal lines, thus optimizing image signal reading.

Implementation Method 1

There is a photodiode 151 to collect photo-generated electrons

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

The magnitude of the floating diffusion voltage change is given by V=Q/C where Q is the amount of charge collected by the photodiode 151 and C is the capacitance of the floating diffusion node 155

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP2140676B1Image sensor pixel with gain control
Publication Date: 2015.08.19 OMNIVISION TECHNOLOGIES INC
  • EP2140676B1 patent drawingFigure 1~2
  • EP2140676B1 patent drawingFigure 3~4
  • EP2140676B1 patent drawingFigure 5~6

AI summary

A method for reading out an image signal, the method comprising: providing at least two photosensitive regions; providing at least two transfer gates respectively associated with each photosensitive region; providing a common charge-to-voltage conversion region electrically connected to the transfer gates; providing a reset mechanism that resets the common charge-to-voltage conversion region; after transferring charge from at least one of the photo-sensitive regions, disabling all transfer gates at a first time; enabling at least one transfer gate at a subsequent second time; and transferring charge from at least one of the photosensitive regions at a subsequent third time while the at least one transfer gate from the second time remains enabled.