Pixel Gate Driving Circuit Layout for Reduced Dead Space
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Solution Overview
Problem
Existing display technologies face challenges in minimizing dead space and reducing power consumption in display devices.
Innovation Solution
A pixel structure and gate driving circuit design that includes specific transistor configurations and signal timing to optimize gate signal distribution, utilizing N-channel oxide thin-film transistors formed simultaneously with pixel circuit transistors, and employing dual gate driving circuits to minimize dead space and enhance power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional gate driving circuits are used, then the display device can operate, but dead space is increased and power consumption is higher
Solution Approach 1:
The patent merges the gate driving circuit functionality directly into the pixel structure by sharing transistors between the pixel circuit and gate driving circuit. Specifically, the first transistor serves dual purposes: it acts as a switching transistor for the pixel while also functioning as part of the gate driving circuit. This integration eliminates the need for separate dedicated gate driving transistors, thereby reducing dead space and lowering power consumption while maintaining circuit functionality
Solution Approach 2:
The patent implements multi-functionality by designing transistors that perform multiple roles. The first transistor simultaneously serves as a pixel switching transistor and a gate driving circuit element. The gate signal lines are also designed to serve dual purposes: controlling pixel operation and driving the gate driving circuit. This universal design reduces the total component count and improves power efficiency
2Area of stationary object
If conventional gate driving circuits are used, then the display device can operate, but dead space is increased
Solution Approach 1:
The patent merges the gate driving circuit functionality directly into the pixel structure by sharing transistors between the pixel circuit and gate driving circuit. Specifically, the first transistor serves dual purposes: it acts as a switching transistor for the pixel while also functioning as part of the gate driving circuit. This integration eliminates the need for separate dedicated gate driving transistors, thereby reducing dead space and lowering power consumption while maintaining circuit functionality
Solution Approach 2:
The patent applies the nesting principle by embedding the gate driving circuit functionality within the pixel circuit structure. The gate driving circuit is nested within the pixel by sharing the first transistor and utilizing the gate signal lines for dual purposes. This nested configuration allows the gate driving functionality to be housed within the existing pixel footprint, minimizing additional dead space
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
A pixel according to an embodiment of the present invention may comprise: a light-emitting diode; a first transistor; a second transistor connected to a gate of the first transistor and a data line; a third transistor connected to the gate of the first transistor and a first voltage line; a fourth transistor connected to the first transistor and a second voltage line; a fifth transistor connected to the first transistor and a third voltage line; and a sixth transistor connected to the first transistor and the light-emitting diode, wherein a gate signal supplied to a gate of the sixth transistor is a signal obtained by shifting a gate signal supplied to a gate of the fifth transistor for a predetermined time.