Unit Pixel With Photodiode Under Gate For Image Sensor Size Reduction
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Solution Overview
Problem
The demand for smaller size image sensors with high resolution is increasing, but existing technologies face challenges in efficiently integrating transistors to achieve this without compromising performance.
Innovation Solution
A unit pixel design that includes a sensing transistor with a gate connecting a reference active region and an output active region on a semiconductor substrate, a photo diode, and a reset drain region, allowing for reduced transistor count while maintaining high resolution through controlled voltage levels for different operational modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of stationary object
If existing transistor integration technologies are used, then device complexity is maintained, but image sensor size cannot be reduced sufficiently
Solution Approach 1:
The patent merges the reference transistor and sensing transistor functions into a single integrated structure where the gate of the sensing transistor serves dual purposes: as the sensing element gate and as the reference transistor gate through shared doping regions. This consolidation reduces the number of discrete transistor components needed, enabling smaller image sensor size while managing integration complexity.
Solution Approach 2:
The gate structure in the patent performs multiple functions simultaneously: it acts as the control gate for the sensing transistor, provides the reference potential for the reference transistor through shared doping regions, and enables both sensing and reference current paths. This multi-functionality reduces the overall device complexity while achieving compact sensor design.
2Area of stationary object
If transistor count is reduced, then image sensor size is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements a nested structure where the reference active region is positioned within or adjacent to the sensing transistor gate region, and the reset drain region is integrated into the same doped area. This nesting approach allows multiple functional regions to share space and alignment references, reducing the cumulative alignment errors that would otherwise increase with reduced transistor count and smaller features.
Solution Approach 2:
The patent applies different doping concentrations and types to specific local regions: the sensing transistor gate and reference transistor gate share a common doped region with optimized concentration for reference current stability, while the photo diode region has tailored doping for optimal charge collection. This localized optimization maintains manufacturing precision by focusing precision requirements on critical interfaces rather than requiring uniform high precision throughout the entire structure.
3Adaptability or versatility
If gate voltage levels are optimized for different modes, then operational versatility is improved, but device complexity increases
Solution Approach 1:
The patent implements dynamic voltage control where the gate voltage can be adjusted to different levels to switch between operational modes: a first voltage level for reset mode to clear accumulated charge, a second voltage level for sensing mode to detect incident light, and a third voltage level for readout mode to transfer the sensed signal. This dynamic voltage adjustment enables operational versatility using a single gate structure, avoiding the need for multiple static circuits and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables a reduction in image sensor size while increasing resolution by optimizing transistor placement and voltage control, allowing for efficient conversion of incident light to electrical signals.
Implementation Method 1
efficient conversion of incident light to electrical signals
Data Source
AI summary
A unit pixel includes a sensing transistor, a photo diode, and a reset drain region. The sensing transistor includes a reference active region, an output active region, and a gate. The gate is between the reference active region and the output active region to electrically connect the reference active region to the output active region based on a gate voltage. The reference active region and output active region are within a semiconductor substrate. The photo diode is under the gate within the semiconductor substrate. The reset drain region is within the semiconductor substrate and is electrically connected to the photo diode by the gate based on the gate voltage.