Light-Emitting Device Pixel Timing for Stable Gate Potentials
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Solution Overview
Problem
As pixel size decreases in light emitting devices with increasing resolution, parasitic capacitance between elements and wiring patterns increases, leading to potential changes in transistor gate potentials and image quality deterioration.
Innovation Solution
A light emitting device with a pixel structure that includes a driving transistor, a light emission control transistor, a write transistor, and capacitive elements, utilizing a correction period for reference signal writing, followed by a write period for luminance signal writing, and a light emission period, with the light emission control transistor becoming conductive after the correction period to minimize parasitic capacitance effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel size decreases to increase resolution, then display resolution is improved, but parasitic capacitance between elements and wiring patterns increases
Solution Approach 1:
The patent applies preliminary action by introducing a correction period before the light emission period during which a reference signal is written into the storage node. This preliminary correction action compensates for the harmful effects of parasitic capacitance that will occur during subsequent signal writing and light emission, thereby maintaining signal accuracy despite the reduced pixel size
Solution Approach 2:
The patent changes the timing parameters of signal writing by separating the process into a correction period (writing reference signal) and a light emission period (writing luminance signal). This parameter change in timing allows the system to compensate for parasitic capacitance effects by adjusting when signals are written relative to each other
2Productivity
If element size decreases to reduce pixel area, then device density is improved, but gate potential stability deteriorates due to increased parasitic capacitance
Solution Approach 1:
The correction period performs a preliminary action by writing a reference signal into the storage node before the luminance signal is written. This preliminary reference writing allows the system to compensate for parasitic capacitance-induced potential changes by establishing a baseline that can be used for correction
Solution Approach 2:
The patent implements feedback by comparing the reference signal written during the correction period with the luminance signal written during the light emission period. This feedback mechanism allows the system to detect and compensate for parasitic capacitance effects on gate potential stability
Data Source
AI summary
A light emitting device including a pixel is provided. The pixel includes a light emitting element, a driving transistor connected to the light emitting element, a control transistor arranged between the driving transistor and a supply line and a write transistor arranged between a control terminal of the driving transistor and a signal line. One frame period includes a correction period during which the write transistor is rendered conductive and a reference signal is written in the control terminal, a write period during which the write transistor is rendered conductive and a luminance signal is written in the control terminal, and a light emission period. The control transistor is rendered conductive during a conductive state of the write transistor in the correction period, and is rendered conductive after the correction period and before the write period.