Pixel-Level Imaging Circuit With Analog Summing for Low-Resolution Output

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Solution Overview

Problem

Conventional solid-state imaging elements face challenges in maintaining image quality while reducing resolution without excessive power consumption, as AD conversion for each pixel can lead to degraded image quality and increased power usage.

Innovation Solution

A solid-state imaging element with a comparison unit generating a difference signal between an analog pixel signal and a reference signal, an addition circuit performing analog addition of difference signals between adjacent pixels, and a data storage unit holding digital signals indicating signal inversion, allowing for pixel addition modes that reduce AD conversions and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If pixel signals are thinned out to lower resolution, then the output format matches the destination device requirements, but image quality degrades as the number of thinned-out pixels increases

Engineering Contradiction:
Improveoutput format compatibilityVSAvoidimage quality
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent combines multiple pixel signals through analog addition circuits to generate resolution-reduced output. Instead of simply selecting and discarding pixels (thinning), the invention adds the analog signals from multiple pixels and converts the summed signal to digital, thereby merging information from multiple pixels into fewer output pixels while maintaining image quality.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If digital signals are added without thinning out pixel signals to lower resolution, then image quality degradation is suppressed, but power consumption increases and cannot be sufficiently suppressed

Engineering Contradiction:
Improveimage qualityVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent replaces digital signal processing with analog signal processing. Instead of converting all pixel signals to digital and then adding them digitally (which consumes high power), the invention performs the addition operation in the analog domain using analog addition circuits, and only performs AD conversion on the final summed signal, thereby dramatically reducing power consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If AD conversion is performed for each pixel to improve conversion speed, then AD conversion speed is improved, but it becomes difficult to simultaneously suppress image quality degradation and power consumption when lowering resolution

Engineering Contradiction:
ImproveAD conversion speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple pixel signals in the analog domain before AD conversion. By adding analog signals from multiple pixels and performing a single AD conversion on the summed signal rather than converting each pixel individually, the invention reduces the number of AD conversion operations while maintaining fast conversion speed and reducing power consumption.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11563913B2Solid-state imaging element and imaging device
Publication Date: 2023.01.24 SONY SEMICON SOLUTIONS CORP
  • US11563913B2 patent drawing
  • US11563913B2 patent drawing
  • US11563913B2 patent drawing

AI summary

In a solid-state imaging element that performs AD conversion for each pixel, image quality degradation when resolution is lowered is suppressed without wastefully consuming power.The solid-state imaging element includes a plurality of pixels. Each of the plurality of pixels is provided with a comparison unit, an addition circuit, and a data storage unit. The comparison unit generates a difference signal obtained by amplifying a difference between an analog pixel signal to which a predetermined coordinate is assigned and a predetermined reference signal. The addition circuit generates an addition signal by performing analog addition of the difference signal and a difference signal regarding another coordinate adjacent to the predetermined coordinate. The data storage unit holds a digital signal indicating a time when an output signal of the comparison unit corresponding to the addition signal is inverted.